<div dir="ltr"><div>I tried to add an 'OptForSize' requirement to a pattern in X86InstrSSE.td, but it appears to be ignored. However, the condition was detected when specified as a predicate.<br><br></div>So this doesn't work: <span class=""><br> def</span> <span class="">:</span> <span class="">Pat</span><span class=""><(</span><span class="">v2f64</span> <span class="">(</span><span class="">X86VBroadcast</span> <span class="">(</span><span class="">loadf64</span> <span class="">addr</span><span class="">:</span><span class="">$src</span><span class="">))),</span>
<span class="">(</span><span class="">VMOVDDUPrm</span> <span class="">addr</span><span class="">:</span><span class="">$src</span><span class="">)>,<br> </span> <b><span class="">Requires</span><span class=""><[</span><span class="">OptForSize</span></b><span class=""><b>]></b>;</span>
<span class=""></span><span class=""></span><div><br>But this does:<br><b> let Predicates = [OptForSize] in</b> {<span class=""><br> def</span> <span class="">:</span> <span class="">Pat</span><span class=""><(</span><span class="">v2f64</span> <span class="">(</span><span class="">X86VBroadcast</span> <span class="">(</span><span class="">loadf64</span> <span class="">addr</span><span class="">:</span><span class="">$src</span><span class="">))),</span>
<span class="">(</span><span class="">VMOVDDUPrm</span> <span class="">addr</span><span class="">:</span><span class="">$src</span><span class="">)>;</span><br> }<br><br></div><div>I see both forms used on some patterns like this:<br><b> let Predicates = [HasAVX] </b>in {<br> def : Pat<(X86Movddup (loadv2f64 addr:$src)),<br> (VMOVDDUPrm addr:$src)>, <b>Requires<[HasAVX]></b>;<br> }<br><br></div><div>Is a predicate different than a requirement or is this a bug?<br><br></div><div>There are existing patterns that specify 'OptForSize' with "Requires", but they are not behaving as I expected. <br><br>Example:<br> // For scalar unary operations, fold a load into the operation<br> // only in OptForSize mode. It eliminates an instruction, but it also<br> // eliminates a whole-register clobber (the load), so it introduces a<br> // partial register update condition.<br> def : Pat<(f32 (fsqrt (load addr:$src))),<br> (VSQRTSSm (f32 (IMPLICIT_DEF)), addr:$src)>,<br> Requires<[HasAVX, OptForSize]>;<br><br></div><div>This is generated:<br></div><div> vsqrtss (%rdi), %xmm0, %xmm0<br><br></div><div>regardless of whether I specify -Os or -O1 with clang.<br></div></div>