<html><body><div style="color:#000; background-color:#fff; font-family:HelveticaNeue, Helvetica Neue, Helvetica, Arial, Lucida Grande, sans-serif;font-size:12pt"><div><span>Has anyone ever did a python to LLVM to IR to VHDL compiler ??? Has anyone used LLVM to ultimately create a Python to VHDL compiler ??? </span></div><div style="color: rgb(0, 0, 0); font-size: 16px; font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-style: normal; background-color: transparent;"><span><br></span></div><div style="color: rgb(0, 0, 0); font-size: 16px; font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-style: normal; background-color: transparent;"><span>Thanks,</span></div><div style="color: rgb(0, 0, 0); font-size: 16px; font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-style: normal; background-color:
transparent;"><span><br></span></div><div style="color: rgb(0, 0, 0); font-size: 16px; font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-style: normal; background-color: transparent;"><span><br></span></div><div style="color: rgb(0, 0, 0); font-size: 16px; font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-style: normal; background-color: transparent;"><span>David Blubaugh</span></div><div style="color: rgb(0, 0, 0); font-size: 16px; font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-style: normal; background-color: transparent;"><span><br></span></div><div style="color: rgb(0, 0, 0); font-size: 16px; font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-style: normal; background-color: transparent;"><span><br></span></div><div style="color: rgb(0, 0, 0); font-size:
16px; font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-style: normal; background-color: transparent;"><span><br></span></div> <div class="qtdSeparateBR"><br><br></div><div class="yahoo_quoted" style="display: block;"> <div style="font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12pt;"> <div style="font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 12pt;"> <div dir="ltr"> <font size="2" face="Arial"> On Monday, September 1, 2014 8:35 PM, "llvmdev-request@cs.uiuc.edu" <llvmdev-request@cs.uiuc.edu> wrote:<br> </font> </div> <br><br> <div class="y_msg_container">Send LLVMdev mailing list submissions to<br> <a ymailto="mailto:llvmdev@cs.uiuc.edu" href="mailto:llvmdev@cs.uiuc.edu">llvmdev@cs.uiuc.edu</a><br><br>To subscribe or unsubscribe via the World Wide Web,
visit<br> <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br>or, via email, send a message with subject or body 'help' to<br> <a ymailto="mailto:llvmdev-request@cs.uiuc.edu" href="mailto:llvmdev-request@cs.uiuc.edu">llvmdev-request@cs.uiuc.edu</a><br><br>You can reach the person managing the list at<br> <a ymailto="mailto:llvmdev-owner@cs.uiuc.edu" href="mailto:llvmdev-owner@cs.uiuc.edu">llvmdev-owner@cs.uiuc.edu</a><br><br>When replying, please edit your Subject line so it is more specific<br>than "Re: Contents of LLVMdev digest..."<br><br><br>Today's Topics:<br><br> 1. VMKit is retired (but you can help if you want!) (Ga?l Thomas)<br> 2. Instrumenting Various Types Using Single Instrumentation<br> Function (Manish Gupta)<br> 3. Problem linking and JITing code through C++-API
(Andy Jost)<br> 4. Re: Instrumenting Various Types Using Single Instrumentation<br> Function (John Criswell)<br> 5. Fwd: understanding DAG: node creation (Dmitri Kovalenko)<br><br><br>----------------------------------------------------------------------<br><br>Message: 1<br>Date: Mon, 1 Sep 2014 21:34:58 +0200<br>From: Ga?l Thomas <<a ymailto="mailto:gael.thomas00@gmail.com" href="mailto:gael.thomas00@gmail.com">gael.thomas00@gmail.com</a>><br>To: LLVM Developers Mailing List <<a ymailto="mailto:llvmdev@cs.uiuc.edu" href="mailto:llvmdev@cs.uiuc.edu">llvmdev@cs.uiuc.edu</a>>, Nicolas<br> Geoffray <<a ymailto="mailto:nicolas.geoffray@gmail.com" href="mailto:nicolas.geoffray@gmail.com">nicolas.geoffray@gmail.com</a>><br>Subject: [LLVMdev] VMKit is retired (but you can help if you want!)<br>Message-ID:<br>
<CAOWuPDcZBpt_JJ5yo5YN=C+RWbtbneXB1UGd90d0mXdnrs8=<a ymailto="mailto:RQ@mail.gmail.com" href="mailto:RQ@mail.gmail.com">RQ@mail.gmail.com</a>><br>Content-Type: text/plain; charset=UTF-8<br><br>Hi all,<br><br>So, as explained in the LLVM weekly, the VMKit project is retired. It<br>was a very fun project, but we don't have any manpower to maintain the<br>code since one year. If someone is interested by restarting the<br>project, just send me an email, I can help to understand the<br>architecture of the project and how it works. I'm pretty sure that we<br>can also extract a Java to LLVM compiler easily (I know that some<br>people are interested by that).<br><br>And I want to thank all the LLVM team for their support during these<br>last ten (yes ten:)) years! Without their help, it would have been<br>impossible to develop VMKit.<br><br>See you and thank you!<br>Ga?l<br><br><br><br>------------------------------<br><br>Message: 2<br>Date: Mon, 1 Sep
2014 13:50:53 -0700<br>From: Manish Gupta <<a ymailto="mailto:manishg@cs.ucsd.edu" href="mailto:manishg@cs.ucsd.edu">manishg@cs.ucsd.edu</a>><br>To: llvmdev <<a ymailto="mailto:llvmdev@cs.uiuc.edu" href="mailto:llvmdev@cs.uiuc.edu">llvmdev@cs.uiuc.edu</a>><br>Subject: [LLVMdev] Instrumenting Various Types Using Single<br> Instrumentation Function<br>Message-ID:<br> <CAL6s+Wn0zEnUpa3ze2vMdO03PJi+<a ymailto="mailto:8s-xo_TeOmWgoExc8xmHwg@mail.gmail.com" href="mailto:8s-xo_TeOmWgoExc8xmHwg@mail.gmail.com">8s-xo_TeOmWgoExc8xmHwg@mail.gmail.com</a>><br>Content-Type: text/plain; charset="utf-8"<br><br>Hi All,<br><br><br>My instrumentation code needs to insert calls to transmit Value list. Each<br>element in this list could be of different type. The list is sent to<br>instrumenting function say void recordVarInputValues(int num, ...) . So, I<br>have created a Union type in Tracing.cpp,
which I link with my benchmark<br>module at compile time. These steps are similar to giri instrumentation<br><a href="https://github.com/liuml07/giri" target="_blank">https://github.com/liuml07/giri</a><br><br>union NumericType<br>{<br> int iValue;<br> long lValue;<br> double dValue;<br> ...<br>};<br><br>Now, I would like to convert all the llvm Values, required by<br>recordVarInputValues function, to be of NumericType. So that a variable<br>length list of NumerricType values can be passed to my instrumentation<br>function. This way I will not have to create different instrumentation<br>functions for different data types.<br><br>Can I cast say i32 value to NumericType value in my instrumentation code,<br>without inserting additional instructions in my benchmark code. I tried<br>inserting bitcast instructions and it doesn't work
for me...<br><br>if(!CastInst::isCastable(Lvals[j]->getType(), UnionVar->getType())){<br> errs()<<"CAST TO NumericType NOT POSSIBLE\n";<br> exit(0);<br> }<br> CastInst *I = CastInst::CreateZExtOrBitCast(Lvals[j],<br>UnionVar->getType(), "", F);<br><br><br>Is this even possible or some other method will be better?<br><br>Thanks!<br>Manish<br>-------------- next part --------------<br>An HTML attachment was scrubbed...<br>URL: <<a href="http://lists.cs.uiuc.edu/pipermail/llvmdev/attachments/20140901/7454021b/attachment-0001.html" target="_blank">http://lists.cs.uiuc.edu/pipermail/llvmdev/attachments/20140901/7454021b/attachment-0001.html</a>><br><br>------------------------------<br><br>Message: 3<br>Date: Mon, 1 Sep 2014 23:41:32 +0000<br>From: Andy Jost <<a ymailto="mailto:Andrew.Jost@synopsys.com"
href="mailto:Andrew.Jost@synopsys.com">Andrew.Jost@synopsys.com</a>><br>To: "<a ymailto="mailto:LLVMdev@cs.uiuc.edu" href="mailto:LLVMdev@cs.uiuc.edu">LLVMdev@cs.uiuc.edu</a>" <<a ymailto="mailto:LLVMdev@cs.uiuc.edu" href="mailto:LLVMdev@cs.uiuc.edu">LLVMdev@cs.uiuc.edu</a>><br>Subject: [LLVMdev] Problem linking and JITing code through C++-API<br>Message-ID:<br> <<a ymailto="mailto:CD79F295D495814684E75D6407C8476284668853@US01WEMBX2.internal.synopsys.com" href="mailto:CD79F295D495814684E75D6407C8476284668853@US01WEMBX2.internal.synopsys.com">CD79F295D495814684E75D6407C8476284668853@US01WEMBX2.internal.synopsys.com</a>><br> <br>Content-Type: text/plain; charset="us-ascii"<br><br>I have a frontend that generates some LLVM bitcode that needs to be linked with other bitcode (its runtime library), which I generate from C++ source using Clang.<br><br>If I write the output of my program to disk, link it with
llvm-link, and then run it with lli, everything works perfectly. But if I try to perform the linking and running steps in my main program, I get this error during llvm::ExecutionEngine::getPointerToFunction:<br><br>Stack dump:<br>0. Running pass 'X86 Machine Code Emitter' on function '@.step.myappend'<br>1. Running pass 'X86 Machine Code Emitter' on function '@.step.myappend'<br>Segmentation fault (core dumped)<br><br>There are no other messages. Any idea what I'm doing wrong? I'll copy the source of my main C++ file and the bitcode for .step.myappend below. I can send the full bitcode file, too, if someone asks for it, but it is around 800 lines.<br><br><br>####################<br><br><br>#include <fstream><br>#include <iostream><br>#include "llvm/Bitcode/ReaderWriter.h"<br>#include "llvm/ExecutionEngine/JIT.h"<br>#include "llvm/IR/DataLayout.h"<br>#include
"llvm/Linker.h"<br>#include "llvm/PassManager.h"<br>#include "llvm/Support/MemoryBuffer.h"<br>#include "llvm/Support/raw_ostream.h"<br>#include "llvm/Support/system_error.h"<br>#include "llvm/Support/TargetSelect.h"<br>#include "llvm/Transforms/IPO.h"<br>#include "llvm/Transforms/Scalar.h"<br>#include "sprite/compiler.hpp"<br>#include "sprite/config.hpp"<br>#include "sprite/curryinput.hpp"<br>#include "sprite/icurry_parser.hpp"<br><br>namespace<br>{<br> std::string dirname(std::string const & path)<br> {<br> size_t const pos = path.find_last_of("/");<br> return path.substr(0, pos == std::string::npos ? 0 : pos);<br> }<br><br> std::string basename(std::string const & path)<br> {<br> size_t const pos = path.find_last_of("/");<br> return path.substr(pos == std::string::npos ? 0 : pos + 1);<br> }<br><br> std::string remove_extension(std::string const &
path)<br> {<br> size_t const pos = path.find_last_of(".");<br> return pos == std::string::npos ? path : path.substr(0, pos);<br> }<br><br> std::string joinpath(std::string const & dirname, std::string const & path)<br> {<br> if(!path.empty() && path.front() == '/')<br> return path;<br> if(dirname.empty())<br> return path;<br> return dirname.back() == '/' ? dirname + path : dirname + "/" + path;<br> }<br>}<br><br>int main(int argc, char const *argv[])<br>{<br> if(argc != 2)<br> {<br> std::cerr << "Usage: " << argv[0] << " <file.curry>" << std::endl;<br> return 1;<br> }<br><br> std::string const curry2read =<br> std::string(SPRITE_LIBINSTALL) + "/cmc/translator/bin/curry2read";<br> std::string const
curryfile(argv[1]);<br> std::string const readablefile = joinpath(<br> dirname(curryfile)<br> , ".curry/" + remove_extension(basename(curryfile)) + ".read"<br> );<br><br> // Generate the readable Curry file.<br> int ok = std::system((curry2read + " -q " + curryfile).c_str());<br> if(ok != 0) return 1;<br> std::ifstream input(readablefile);<br> if(!input)<br> {<br> std::cerr << "Could not open \"" << readablefile << "\"" << std::endl;<br> return 1;<br> }<br><br> // Parse the input program.<br> sprite::curry::Library lib;<br> input >> lib;<br> std::string topmodule = lib.modules.front().name;<br> // sprite::compiler::prettyprint(lib);<br><br> // Compile the program.<br> sprite::compiler::LibrarySTab stab;<br> sprite::compiler::compile(lib, stab);<br><br>
// Declare the main function.<br> namespace tgt = sprite::backend;<br> auto & module_stab = stab.modules.at(topmodule);<br> auto & compiler = *module_stab.compiler;<br> tgt::scope _ = module_stab.module_ir;<br> tgt::extern_(<br> tgt::types::int_(32)(), "main", {}<br> , [&]{<br> // Construct the root expression (just the "main" symbol).<br> tgt::value root_p = compiler.node_alloc();<br> sprite::curry::Qname const main_{topmodule, "main"};<br> root_p = construct(compiler, root_p, {main_, {}});<br><br> // Evaluate and then print the root expression.<br> compiler.rt.normalize(root_p);<br> compiler.rt.printexpr(root_p, "\n");<br><br> tgt::return_(0);<br>
}<br> );<br><br> // module_stab.module_ir->dump();<br><br> // Load the runtime library.<br> llvm::OwningPtr<llvm::MemoryBuffer> buffer;<br> llvm::error_code err = llvm::MemoryBuffer::getFile(<br> SPRITE_LIBINSTALL "/sprite-rt.bc", buffer<br> );<br> if(err)<br> {<br> std::cerr << err.message() << std::endl;<br> return EXIT_FAILURE;<br> }<br><br> // Make the runtime library into a module.<br> std::string errmsg;<br> llvm::Module *rtlib = llvm::ParseBitcodeFile(<br> buffer.get(), module_stab.module_ir.context(), &errmsg<br> );<br> if(!rtlib)<br> {<br> std::cerr << errmsg << std::endl;<br> return EXIT_FAILURE;<br> }<br><br> // Link the compiled program code into the runtime module.<br> bool failed
= llvm::Linker::LinkModules(<br> rtlib, module_stab.module_ir.ptr(), llvm::Linker::PreserveSource, &errmsg<br> );<br> if(failed)<br> {<br> std::cerr << errmsg << std::endl;<br> return EXIT_FAILURE;<br> }<br><br> std::cout << "Linking done..." << std::endl;<br> rtlib->dump();<br><br> // Run optimization passes.<br> // std::vector<const char *> exportList;<br> // llvm::PassManager Passes;<br> // Passes.add(new llvm::DataLayout(rtlib));<br> // Passes.add(llvm::createDemoteRegisterToMemoryPass());<br> // Passes.add(llvm::createInternalizePass(exportList));<br> // Passes.add(llvm::createScalarReplAggregatesPass());<br> // Passes.add(llvm::createInstructionCombiningPass());<br> // Passes.add(llvm::createGlobalOptimizerPass());<br> //
Passes.add(llvm::createFunctionInliningPass());<br> // Passes.run(*rtlib);<br><br> // Create the JIT<br> llvm::InitializeNativeTarget();<br> llvm::ExecutionEngine * jit = llvm::EngineBuilder(rtlib)<br> .setErrorStr(&errmsg)<br> .setEngineKind(llvm::EngineKind::JIT)<br> .create();<br> if(!jit)<br> {<br> std::cerr << "Failed to create JIT compiler: " << errmsg << std::endl;<br> return EXIT_FAILURE;<br> }<br><br> // Execute the program.<br> std::cout << "Begin Execution..." << std::endl;<br> // rtlib->dump();<br> void * main_fp = jit->getPointerToFunction(rtlib->getFunction("main"));<br> int32_t (*target_program)() = (int32_t(*)())(intptr_t)(main_fp);<br> std::cout << "Ready..." << std::endl;<br> return target_program();<br><br>
#if 0<br> // Write a bitcode file and interpret it.<br> {<br> std::string err;<br> llvm::raw_fd_ostream fout("sprite-out.bc", err, llvm::raw_fd_ostream::F_Binary);<br> llvm::WriteBitcodeToFile(module_stab.module_ir.ptr(), fout);<br> }<br> std::system("llvm-link-3.3 sprite-out.bc " SPRITE_LIBINSTALL "/sprite-rt.bc > tmp.bc");<br> std::system("mv tmp.bc sprite-out.bc");<br> int const status = std::system("lli-3.3 sprite-out.bc");<br> return WEXITSTATUS(status);<br> #endif<br>}<br><br><br>####################<br><br><br>define linkonce void @.step.myappend(%"struct.sprite::compiler::node"* %root_p) {<br>.entry:<br> %0 = alloca %"struct.sprite::compiler::node"*<br> %1 = alloca %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %root_p, %"struct.sprite::compiler::node"** %0<br> %2 = load
%"struct.sprite::compiler::node"** %0<br> %3 = getelementptr %"struct.sprite::compiler::node"* %2, i32 0, i32 2<br> %4 = load i8** %3<br> %5 = bitcast i8* %4 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %5, %"struct.sprite::compiler::node"** %0<br> br label %11<br><br>; <label>:6 ; preds = %11<br> %7 = load %"struct.sprite::compiler::node"** %0<br> %8 = getelementptr %"struct.sprite::compiler::node"* %7, i32 0, i32 2<br> %9 = load i8** %8<br> %10 = bitcast i8* %9 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %10, %"struct.sprite::compiler::node"** %0<br> br label %11, !sprite.implied !0<br><br>; <label>:11
; preds = %6, %.entry<br> %12 = load %"struct.sprite::compiler::node"** %0<br> %13 = getelementptr %"struct.sprite::compiler::node"* %12, i32 0, i32 1<br> %14 = load i64* %13<br> %15 = load i64* %13<br> %16 = icmp eq i64 %15, -3<br> br i1 %16, label %6, label %17<br><br>; <label>:17 ; preds = %11<br> %18 = load %"struct.sprite::compiler::node"** %0<br> store %"struct.sprite::compiler::node"* %18, %"struct.sprite::compiler::node"** %1<br> %19 = getelementptr %"struct.sprite::compiler::node"* %18, i32 0, i32 1<br> %20 = load i64* %19<br> %21 = add i64 %20, 4<br> %22 = getelementptr [6 x i8*]* @.jtable, i32 0, i64 %21<br> %23 = load i8** %22<br> indirectbr i8* %23, [label %24,
label %26, label %36, label %38, label %44, label %66]<br><br>; <label>:24 ; preds = %26, %17<br> %25 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([16 x i8]* @.str21, i32 0, i32 0))<br> ret void, !case...FAIL !1<br><br>; <label>:26 ; preds = %26, %17<br> %27 = load %"struct.sprite::compiler::node"** %1<br> %28 = getelementptr %"struct.sprite::compiler::node"* %27, i32 0, i32 2<br> %29 = load i8** %28<br> %30 = bitcast i8* %29 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %30, %"struct.sprite::compiler::node"** %1<br> %31 = getelementptr %"struct.sprite::compiler::node"* %30, i32 0, i32
1<br> %32 = load i64* %31<br> %33 = add i64 %32, 4<br> %34 = getelementptr [6 x i8*]* @.jtable, i32 0, i64 %33<br> %35 = load i8** %34<br> indirectbr i8* %35, [label %24, label %26, label %36, label %38, label %44, label %66]<br><br>; <label>:36 ; preds = %26, %17<br> %37 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([18 x i8]* @.str22, i32 0, i32 0))<br> ret void, !case...CHOICE !1<br><br>; <label>:38 ; preds = %26, %17<br> %39 = load %"struct.sprite::compiler::node"** %1<br> %40 = getelementptr %"struct.sprite::compiler::node"* %39, i32 0, i32 0<br> %41 = load %"struct.sprite::compiler::vtable"**
%40<br> %42 = getelementptr %"struct.sprite::compiler::vtable"* %41, i32 0, i32 4<br> %43 = load void (%"struct.sprite::compiler::node"*)** %42<br> tail call void %43(%"struct.sprite::compiler::node"* %39)<br> ret void<br><br>; <label>:44 ; preds = %26, %17<br> store %"struct.sprite::compiler::node"* %root_p, %"struct.sprite::compiler::node"** %0<br> %45 = load %"struct.sprite::compiler::node"** %0<br> %46 = getelementptr %"struct.sprite::compiler::node"* %45, i32 0, i32 3<br> %47 = load i8** %46<br> %48 = bitcast i8* %47 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %48, %"struct.sprite::compiler::node"** %0<br> br label %54<br><br>; <label>:49
; preds = %54<br> %50 = load %"struct.sprite::compiler::node"** %0<br> %51 = getelementptr %"struct.sprite::compiler::node"* %50, i32 0, i32 2<br> %52 = load i8** %51<br> %53 = bitcast i8* %52 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %53, %"struct.sprite::compiler::node"** %0<br> br label %54, !sprite.implied !0<br><br>; <label>:54 ; preds = %49, %44<br> %55 = load %"struct.sprite::compiler::node"** %0<br> %56 = getelementptr %"struct.sprite::compiler::node"* %55, i32 0, i32 1<br> %57 = load i64* %56<br> %58 = load i64* %56<br> %59 = icmp eq i64 %58, -3<br> br i1 %59, label %49, label %60<br><br>; <label>:60
; preds = %54<br> %61 = load %"struct.sprite::compiler::node"** %0<br> %62 = bitcast %"struct.sprite::compiler::node"* %61 to i8*<br> %63 = getelementptr %"struct.sprite::compiler::node"* %root_p, i32 0, i32 0<br> store %"struct.sprite::compiler::vtable"* @.fwd.vt, %"struct.sprite::compiler::vtable"** %63<br> %64 = getelementptr %"struct.sprite::compiler::node"* %root_p, i32 0, i32 1<br> store i64 -3, i64* %64<br> %65 = getelementptr %"struct.sprite::compiler::node"* %root_p, i32 0, i32 2<br> store i8* %62, i8** %65<br> ret void<br><br>; <label>:66 ; preds = %26, %17<br> store %"struct.sprite::compiler::node"* %root_p, %"struct.sprite::compiler::node"**
%0<br> %67 = load %"struct.sprite::compiler::node"** %0<br> %68 = getelementptr %"struct.sprite::compiler::node"* %67, i32 0, i32 2<br> %69 = load i8** %68<br> %70 = bitcast i8* %69 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %70, %"struct.sprite::compiler::node"** %0<br> br label %76<br><br>; <label>:71 ; preds = %76<br> %72 = load %"struct.sprite::compiler::node"** %0<br> %73 = getelementptr %"struct.sprite::compiler::node"* %72, i32 0, i32 2<br> %74 = load i8** %73<br> %75 = bitcast i8* %74 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %75, %"struct.sprite::compiler::node"** %0<br> br label %76, !sprite.implied !0<br><br>; <label>:76
; preds = %71, %66<br> %77 = load %"struct.sprite::compiler::node"** %0<br> %78 = getelementptr %"struct.sprite::compiler::node"* %77, i32 0, i32 1<br> %79 = load i64* %78<br> %80 = load i64* %78<br> %81 = icmp eq i64 %80, -3<br> br i1 %81, label %71, label %82<br><br>; <label>:82 ; preds = %76<br> %83 = load %"struct.sprite::compiler::node"** %0<br> %84 = getelementptr %"struct.sprite::compiler::node"* %83, i32 0, i32 2<br> %85 = load i8** %84<br> %86 = bitcast i8* %85 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %86, %"struct.sprite::compiler::node"** %0<br> br label %92<br><br>; <label>:87
; preds = %92<br> %88 = load %"struct.sprite::compiler::node"** %0<br> %89 = getelementptr %"struct.sprite::compiler::node"* %88, i32 0, i32 2<br> %90 = load i8** %89<br> %91 = bitcast i8* %90 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %91, %"struct.sprite::compiler::node"** %0<br> br label %92, !sprite.implied !0<br><br>; <label>:92 ; preds = %87, %82<br> %93 = load %"struct.sprite::compiler::node"** %0<br> %94 = getelementptr %"struct.sprite::compiler::node"* %93, i32 0, i32 1<br> %95 = load i64* %94<br> %96 = load i64* %94<br> %97 = icmp eq i64 %96, -3<br> br i1 %97, label %87, label
%98<br><br>; <label>:98 ; preds = %92<br> %99 = load %"struct.sprite::compiler::node"** %0<br> %100 = bitcast %"struct.sprite::compiler::node"* %99 to i8*<br> %101 = call i8* @malloc(i64 32)<br> %102 = bitcast i8* %101 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %root_p, %"struct.sprite::compiler::node"** %0<br> %103 = load %"struct.sprite::compiler::node"** %0<br> %104 = getelementptr %"struct.sprite::compiler::node"* %103, i32 0, i32 2<br> %105 = load i8** %104<br> %106 = bitcast i8* %105 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %106, %"struct.sprite::compiler::node"** %0<br> br label %112<br><br>; <label>:107
; preds = %112<br> %108 = load %"struct.sprite::compiler::node"** %0<br> %109 = getelementptr %"struct.sprite::compiler::node"* %108, i32 0, i32 2<br> %110 = load i8** %109<br> %111 = bitcast i8* %110 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %111, %"struct.sprite::compiler::node"** %0<br> br label %112, !sprite.implied !0<br><br>; <label>:112 ; preds = %107, %98<br> %113 = load %"struct.sprite::compiler::node"** %0<br> %114 = getelementptr %"struct.sprite::compiler::node"* %113, i32 0, i32 1<br> %115 = load i64* %114<br> %116 = load i64* %114<br> %117 = icmp eq i64 %116, -3<br> br i1 %117, label %107, label %118<br><br>; <label>:118
; preds = %112<br> %119 = load %"struct.sprite::compiler::node"** %0<br> %120 = getelementptr %"struct.sprite::compiler::node"* %119, i32 0, i32 3<br> %121 = load i8** %120<br> %122 = bitcast i8* %121 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %122, %"struct.sprite::compiler::node"** %0<br> br label %128<br><br>; <label>:123 ; preds = %128<br> %124 = load %"struct.sprite::compiler::node"** %0<br> %125 = getelementptr %"struct.sprite::compiler::node"* %124, i32 0, i32 2<br> %126 = load i8** %125<br> %127 = bitcast i8* %126 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"*
%127, %"struct.sprite::compiler::node"** %0<br> br label %128, !sprite.implied !0<br><br>; <label>:128 ; preds = %123, %118<br> %129 = load %"struct.sprite::compiler::node"** %0<br> %130 = getelementptr %"struct.sprite::compiler::node"* %129, i32 0, i32 1<br> %131 = load i64* %130<br> %132 = load i64* %130<br> %133 = icmp eq i64 %132, -3<br> br i1 %133, label %123, label %134<br><br>; <label>:134 ; preds = %128<br> %135 = load %"struct.sprite::compiler::node"** %0<br> %136 = bitcast %"struct.sprite::compiler::node"* %135 to i8*<br> store %"struct.sprite::compiler::node"* %root_p, %"struct.sprite::compiler::node"** %0<br> %137 =
load %"struct.sprite::compiler::node"** %0<br> %138 = getelementptr %"struct.sprite::compiler::node"* %137, i32 0, i32 3<br> %139 = load i8** %138<br> %140 = bitcast i8* %139 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %140, %"struct.sprite::compiler::node"** %0<br> br label %146<br><br>; <label>:141 ; preds = %146<br> %142 = load %"struct.sprite::compiler::node"** %0<br> %143 = getelementptr %"struct.sprite::compiler::node"* %142, i32 0, i32 2<br> %144 = load i8** %143<br> %145 = bitcast i8* %144 to %"struct.sprite::compiler::node"*<br> store %"struct.sprite::compiler::node"* %145, %"struct.sprite::compiler::node"** %0<br> br label %146, !sprite.implied !0<br><br>; <label>:146
; preds = %141, %134<br> %147 = load %"struct.sprite::compiler::node"** %0<br> %148 = getelementptr %"struct.sprite::compiler::node"* %147, i32 0, i32 1<br> %149 = load i64* %148<br> %150 = load i64* %148<br> %151 = icmp eq i64 %150, -3<br> br i1 %151, label %141, label %152<br><br>; <label>:152 ; preds = %146<br> %153 = load %"struct.sprite::compiler::node"** %0<br> %154 = bitcast %"struct.sprite::compiler::node"* %153 to i8*<br> %155 = getelementptr %"struct.sprite::compiler::node"* %102, i32 0, i32 0<br> store %"struct.sprite::compiler::vtable"* @.vtable.for.myappend, %"struct.sprite::compiler::vtable"** %155<br> %156 = getelementptr
%"struct.sprite::compiler::node"* %102, i32 0, i32 1<br> store i64 -1, i64* %156<br> %157 = getelementptr %"struct.sprite::compiler::node"* %102, i32 0, i32 2<br> store i8* %136, i8** %157<br> %158 = getelementptr %"struct.sprite::compiler::node"* %102, i32 0, i32 3<br> store i8* %154, i8** %158<br> %159 = getelementptr %"struct.sprite::compiler::node"* %root_p, i32 0, i32 0<br> store %"struct.sprite::compiler::vtable"* @.vt.CTOR.MyCons, %"struct.sprite::compiler::vtable"** %159<br> %160 = getelementptr %"struct.sprite::compiler::node"* %root_p, i32 0, i32 1<br> store i64 1, i64* %160<br> %161 = getelementptr %"struct.sprite::compiler::node"* %root_p, i32 0, i32 2<br> store i8* %100, i8** %161<br> %162 = getelementptr %"struct.sprite::compiler::node"* %root_p, i32 0, i32 3<br> store i8* %101, i8** %162<br> ret void<br>}<br><br>-------------- next part
--------------<br>An HTML attachment was scrubbed...<br>URL: <<a href="http://lists.cs.uiuc.edu/pipermail/llvmdev/attachments/20140901/52547f6a/attachment-0001.html" target="_blank">http://lists.cs.uiuc.edu/pipermail/llvmdev/attachments/20140901/52547f6a/attachment-0001.html</a>><br><br>------------------------------<br><br>Message: 4<br>Date: Mon, 01 Sep 2014 20:13:56 -0400<br>From: John Criswell <<a ymailto="mailto:jtcriswel@gmail.com" href="mailto:jtcriswel@gmail.com">jtcriswel@gmail.com</a>><br>To: <a ymailto="mailto:manishg@cs.ucsd.edu" href="mailto:manishg@cs.ucsd.edu">manishg@cs.ucsd.edu</a>, llvmdev <<a ymailto="mailto:llvmdev@cs.uiuc.edu" href="mailto:llvmdev@cs.uiuc.edu">llvmdev@cs.uiuc.edu</a>><br>Subject: Re: [LLVMdev] Instrumenting Various Types Using Single<br> Instrumentation Function<br>Message-ID: <<a ymailto="mailto:54050BC4.8060405@gmail.com"
href="mailto:54050BC4.8060405@gmail.com">54050BC4.8060405@gmail.com</a>><br>Content-Type: text/plain; charset="iso-8859-1"; Format="flowed"<br><br>Dear Manish,<br><br>Union types in LLVM are points to structures, so casting 8, 16, 32, and <br>64 bit values to a union pointer is probably not what you want.<br><br>I think the easiest thing to do is to:<br><br>1) Change the function in your run-time library to take the largest <br>integer size supported by your target.<br><br>2) Change the instrumentation code to cast all values (including <br>pointers) to this type.<br><br>I'm not sure if CastInst::isCastable() is what you want to use to check <br>to see that the casting can be done. I would just go ahead and use the <br>bit-cast since, for the call, you should always be casting from a type <br>with lower bit-width to higher bit-width. If you enable assertions when <br>you build LLVM, then you should get an assertion if you try to create a
<br>Bitcast instruction that isn't going to work.<br><br>Regards,<br><br>John Criswell<br><br><br>On 9/1/14, 4:50 PM, Manish Gupta wrote:<br>> Hi All,<br>><br>><br>> My instrumentation code needs to insert calls to transmit Value list. <br>> Each element in this list could be of different type. The list is sent <br>> to instrumenting function say void recordVarInputValues(int num, ...) <br>> . So, I have created a Union type in Tracing.cpp, which I link with my <br>> benchmark module at compile time. These steps are similar to giri <br>> instrumentation <a href="https://github.com/liuml07/giri" target="_blank">https://github.com/liuml07/giri</a><br>><br>> union NumericType<br>> {<br>> int iValue;<br>> long lValue;<br>> double dValue;<br>> ...<br>> };<br>><br>>
Now, I would like to convert all the llvm Values, required by <br>> recordVarInputValues function, to be of NumericType. So that a <br>> variable length list of NumerricType values can be passed to my <br>> instrumentation function. This way I will not have to create different <br>> instrumentation functions for different data types.<br>><br>> Can I cast say i32 value to NumericType value in my instrumentation <br>> code, without inserting additional instructions in my benchmark code. <br>> I tried inserting bitcast instructions and it doesn't work for me...<br>><br>> if(!CastInst::isCastable(Lvals[j]->getType(), UnionVar->getType())){<br>> errs()<<"CAST TO NumericType NOT POSSIBLE\n";<br>> exit(0);<br>> }<br>> CastInst *I = CastInst::CreateZExtOrBitCast(Lvals[j], <br>> UnionVar->getType(), "", F);<br>><br>> Is this
even possible or some other method will be better?<br>><br>> Thanks!<br>> Manish<br>><br>><br>> _______________________________________________<br>> LLVM Developers mailing list<br>> <a ymailto="mailto:LLVMdev@cs.uiuc.edu" href="mailto:LLVMdev@cs.uiuc.edu">LLVMdev@cs.uiuc.edu</a> <a href="http://llvm.cs.uiuc.edu/" target="_blank">http://llvm.cs.uiuc.edu</a><br>> <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br><br>-------------- next part --------------<br>An HTML attachment was scrubbed...<br>URL: <<a href="http://lists.cs.uiuc.edu/pipermail/llvmdev/attachments/20140901/23a75e18/attachment-0001.html" target="_blank">http://lists.cs.uiuc.edu/pipermail/llvmdev/attachments/20140901/23a75e18/attachment-0001.html</a>><br><br>------------------------------<br><br>Message: 5<br>Date: Tue, 2 Sep 2014 04:26:52
+0400<br>From: Dmitri Kovalenko <<a ymailto="mailto:dmitri.a.kovalenko@gmail.com" href="mailto:dmitri.a.kovalenko@gmail.com">dmitri.a.kovalenko@gmail.com</a>><br>To: "<a ymailto="mailto:llvmdev@cs.uiuc.edu" href="mailto:llvmdev@cs.uiuc.edu">llvmdev@cs.uiuc.edu</a>" <<a ymailto="mailto:llvmdev@cs.uiuc.edu" href="mailto:llvmdev@cs.uiuc.edu">llvmdev@cs.uiuc.edu</a>><br>Subject: [LLVMdev] Fwd: understanding DAG: node creation<br>Message-ID:<br> <CAF+j+H_Q42PA63odeQOWwsuL6O-M2NRnB4bRn5ZxRq0Mn4rW+<a ymailto="mailto:Q@mail.gmail.com" href="mailto:Q@mail.gmail.com">Q@mail.gmail.com</a>><br>Content-Type: text/plain; charset="utf-8"<br><br>Sam, that helped. Thank you so much.<br><br><br>2014-09-01 19:04 GMT+04:00 Sam Parker <<a ymailto="mailto:S.Parker3@lboro.ac.uk" href="mailto:S.Parker3@lboro.ac.uk">S.Parker3@lboro.ac.uk</a>>:<br><br> Hi,<br>><br>> I would still switch chain operands to be the last ones and
ensure that<br>> lxacc result type is (MVT::i32, MVT::other) and not the other way around.<br>><br>> good luck,<br>><br>> sam<br>><br>> Sam Parker<br>> Research Student<br>> Electronic System Design Group<br>> School of Electronic, Electrical and Systems Engineering<br>> Loughborough University<br>> UK<br>><br>> On 01/09/14 15:39, Dmitri Kovalenko wrote:<br>><br>> Yes, I'm going to provide it. I believe there must be no additional<br>> work on the scheduling phase. It's just some mistake in the instruction<br>> definition or DAG.<br>><br>> I create Nodes inside SelectionDAGBuilder::visitIntrinicCall like that:<br>><br>> case Intrinsic::sparc_xmac: {<br>> SDVTList nodeTys = DAG.getVTList(MVT::Other, MVT::i32);<br>> SDValue Ops[3];<br>> Ops[0] = getRoot();<br>> Ops[1] =
getValue(I.getArgOperand(0));<br>> Ops[2] = getValue(I.getArgOperand(1));<br>> SDValue xmacCall = DAG.getNode(ISD::XMAC, sdl, nodeTys, Ops);<br>> DAG.setRoot(xmacCall.getValue(0));<br>> return nullptr;<br>> }<br>> case Intrinsic::sparc_srxacc: {<br>> SDVTList nodeTys = DAG.getVTList(MVT::Other, MVT::i32);<br>> SDValue Ops[2];<br>> Ops[0] = getRoot();<br>> Ops[1] = getValue(I.getArgOperand(0));<br>> SDValue srCall = DAG.getNode(ISD::SRXACC, sdl, nodeTys, Ops);<br>> DAG.setRoot(srCall.getValue(0));<br>> return nullptr;<br>> }<br>> case Intrinsic::sparc_lrxacc: {<br>> SDVTList nodeTys = DAG.getVTList(MVT::Other,MVT::i32);<br>> SDValue Ops[1];<br>> Ops[0] = getRoot();<br>>
SDValue lrCall = DAG.getNode(ISD::LRXACC, sdl,<br>> nodeTys, Ops);<br>> DAG.setRoot(lrCall.getValue(0));<br>> setValue(&I, lrCall.getValue(1));<br>> return nullptr;<br>> }<br>><br>> Then, lower them trivially.<br>><br>> setOperationAction(ISD::LRXACC, MVT::Other, Legal);<br>> setOperationAction(ISD::SRXACC, MVT::Other, Legal);<br>> setOperationAction(ISD::XMAC, MVT::Other, Legal);<br>><br>> Then, just set respective instr opcodes in SparcDAGToDAGISel::Select:<br>><br>> case ISD::SRXACC: {<br>> SDVTList nodeTys = CurDAG->getVTList(MVT::Other);<br>><br>> SDValue Ops[2];<br>> Ops[0] = N->getOperand(0);<br>> Ops[1] =
N->getOperand(1);<br>><br>> return CurDAG->SelectNodeTo(N, SP::SRXACC, nodeTys, Ops);<br>> }<br>> case ISD::XMAC: {<br>> SDVTList nodeTys = CurDAG->getVTList(MVT::Other);<br>><br>> SDValue Ops[3];<br>> Ops[0] = N->getOperand(0);<br>> Ops[1] = N->getOperand(1);<br>> Ops[2] = N->getOperand(2);<br>><br>> return CurDAG->SelectNodeTo(N, SP::XMAC, nodeTys, Ops);<br>> }<br>> case ISD::LRXACC: {<br>> SDVTList nodeTys = CurDAG->getVTList(MVT::Other, MVT::i32);<br>> SDValue Ops[1];<br>> Ops[0] = N->getOperand(0);<br>> return CurDAG->SelectNodeTo(N, SP::LRXACC, nodeTys, Ops);<br>> }<br>><br>> They declared as:<br>> def XMAC : F3_1<2, 0b111111,<br>>
(outs),<br>> (ins IntRegs:$rs1, IntRegs:$rs2),<br>> "xmac $rs1, $rs2, %xacc",<br>> []>;<br>><br>> let rs1 = 0, rd = 1, Uses=[XACC] in<br>> def LRXACC : F3_1<2, 0b101110,<br>> (outs IntRegs:$rd), (ins),<br>> "lrxacc %xacc, $rd", []>;<br>><br>> let rd = 0, Defs=[XACC] in<br>> def SRXACC : F3_1<2, 0b011101,<br>> (outs), (ins IntRegs:$rs1),<br>> "srxacc $rs1, %xacc",
[]>;<br>><br>> While my register is declared as:<br>> def XACC : Ri<88, "XACC">, DwarfRegNum<[88]>;<br>><br>> Please, note:<br>> My problem is of self-educational and investigative nature.<br>> This instruction srxacc and register xacc are not real.<br>> Produced code aren't supposed to work anywhere.<br>> I just need llc to be able to output assembly file.<br>> Thanks for your insights.<br>><br>><br>> 2014-09-01 18:26 GMT+04:00 Sam Parker <<a ymailto="mailto:S.Parker3@lboro.ac.uk" href="mailto:S.Parker3@lboro.ac.uk">S.Parker3@lboro.ac.uk</a>>:<br>><br>>> Hi,<br>>> I'm not sure. But in your lowered DAG the chain nodes are the first<br>>> operands for you custom nodes, however for the other nodes the chain is the<br>>> last operand. I seem to remember that during targetlowering the chain is<br>>> the first operand and
then it seems to switch over after ISelDAG, this<br>>> confused me and may have something to do with the issue that you are<br>>> seeing. I really don't know much about scheduling, do you want to post your<br>>> instruction definitions again to see if someone else has some ideas,.<br>>><br>>> cheers,<br>>> sam<br>>><br>>> Sam Parker<br>>> Research Student<br>>> Electronic System Design Group<br>>> School of Electronic, Electrical and Systems Engineering<br>>> Loughborough University<br>>> UK<br>>><br>>> On 01/09/14 14:35, Dmitri Kovalenko wrote:<br>>><br>>> Before I wrote here, I tried both ways you decsribed, but none of<br>>> them has worked out for me.<br>>> With yours sugesstions I was able to move a bit further with the first<br>>> approach (when we don't create regclass and just hard-code it in
.td)<br>>><br>>> But I still receive strange errors. I received DAG which I happy with<br>>> (DAG here: <a href="http://goo.gl/62tpkk" target="_blank">http://goo.gl/62tpkk</a>), but everything goes broken on<br>>> scheduling.<br>>><br>>> I had to chain mine nodes, because otherwise nodes xmac and srxacc got<br>>> removed on first combine. But since they are chained, they have MVT::Other<br>>> return type, and that causes strange crash inside func GetCostFor in<br>>> ScheduleDAGRRList.cpp:<br>>><br>>> Def RegClass = TLI->getRepRegClassFor(VT)->getID();<br>>> When VT is MVT::Other it returns 0x0, what results crash.<br>>><br>>> It got me confused, because reading documentation on CodeGen gave me an<br>>> idea, that chain edges are control flow edges, not data edges. So I don't<br>>> understand why scheduler tries to assign some
register to it.<br>>><br>>> I'm struggling with this problem way to long for now, and I very<br>>> appreciate yours help, Sam.<br>>><br>>><br>>><br>>> 2014-09-01 1:50 GMT+04:00 Sam Parker <<a ymailto="mailto:S.Parker3@lboro.ac.uk" href="mailto:S.Parker3@lboro.ac.uk">S.Parker3@lboro.ac.uk</a>>:<br>>><br>>>> Hi,<br>>>><br>>>> Yes, that's what I would do. If you want LLVM and the register allocator<br>>>> to also know that the instruction explicitly defines the register, I would<br>>>> designate the register into it's own register class and have your<br>>>> instruction write to that class (and there will be only a single option for<br>>>> RA).<br>>>><br>>>> cheers,<br>>>> Sam<br>>>><br>>>> Sam Parker<br>>>> Research Student<br>>>> Electronic Systems Design
Group<br>>>> Loughborough University<br>>>> UK<br>>>><br>>>> ________________________________________<br>>>> From: Dmitri Kovalenko [<a ymailto="mailto:dmitri.a.kovalenko@gmail.com" href="mailto:dmitri.a.kovalenko@gmail.com">dmitri.a.kovalenko@gmail.com</a>]<br>>>> Sent: 31 August 2014 21:53<br>>>> To: Sam Parker<br>>>> Cc: <a ymailto="mailto:llvmdev@cs.uiuc.edu" href="mailto:llvmdev@cs.uiuc.edu">llvmdev@cs.uiuc.edu</a><br>>>> Subject: Re: [LLVMdev] understanding DAG: node creation<br>>>><br>>>> Sam, thanks for your answer.<br>>>> That's a great suggestion.<br>>>><br>>>> And excuse me for maybe dilettante question:<br>>>> To hard-code use of the global register means to hard-code it in the<br>>>> 'asm string' argument of the instruction definition in the .td
file?<br>>>><br>>>><br>>>> 2014-09-01 0:44 GMT+04:00 Sam Parker <<a ymailto="mailto:S.Parker3@lboro.ac.uk" href="mailto:S.Parker3@lboro.ac.uk">S.Parker3@lboro.ac.uk</a><mailto:<br>>>> <a ymailto="mailto:S.Parker3@lboro.ac.uk" href="mailto:S.Parker3@lboro.ac.uk">S.Parker3@lboro.ac.uk</a>>>:<br>>>> Hi Dmitri,<br>>>><br>>>> If you have such a simple intrinsic which operates on a single<br>>>> register, just lower the intrinsic to a target specific node which is only<br>>>> implemented by a single instruction. Like you were doing before and by<br>>>> using a chain operand. Hard code the instruction to use and define the<br>>>> global register and only pass the instruction the actual variable argument.<br>>>><br>>>> Hope that helps,<br>>>> Sam<br>>>><br>>>> Sam Parker<br>>>> Research
Student<br>>>> Electronic Systems Design Group<br>>>> School of Electronic, Electrical and Systems Engineering<br>>>> Loughborough University<br>>>><br>>>> ----- Reply message -----<br>>>> From: "Dmitri Kovalenko" <<a ymailto="mailto:dmitri.a.kovalenko@gmail.com" href="mailto:dmitri.a.kovalenko@gmail.com">dmitri.a.kovalenko@gmail.com</a><mailto:<br>>>> <a ymailto="mailto:dmitri.a.kovalenko@gmail.com" href="mailto:dmitri.a.kovalenko@gmail.com">dmitri.a.kovalenko@gmail.com</a>>><br>>>> To: <<a ymailto="mailto:llvmdev@cs.uiuc.edu" href="mailto:llvmdev@cs.uiuc.edu">llvmdev@cs.uiuc.edu</a><mailto:<a ymailto="mailto:llvmdev@cs.uiuc.edu" href="mailto:llvmdev@cs.uiuc.edu">llvmdev@cs.uiuc.edu</a>>><br>>>> Subject: [LLVMdev] understanding DAG: node creation<br>>>> Date: Sat, Aug 30, 2014 22:18<br>>>><br>>>><br>>>> I
have an intrinsic and it must be lowered to instruction, which works<br>>>> with fixed register.<br>>>> So, it takes contents of this register and another argument as input.<br>>>> After execution, the result of the instruction is placed into that same<br>>>> fixed register.<br>>>><br>>>> What should I do in SelectionDAGBuilder::visitIntrinicCall to describe<br>>>> such behaviour for a SDNode?<br>>>><br>>>> Thank you for the ideas and insights.<br>>>><br>>>> --<br>>>> Sincerely,<br>>>> Dmitri Kovalenko<br>>>><br>>>><br>>>><br>>>> --<br>>>> Sincerely,<br>>>> Dmitri Kovalenko<br>>>><br>>><br>>><br>>><br>>> --<br>>> Sincerely,<br>>> Dmitri Kovalenko<br>>><br>>><br>>><br>><br>><br>> --<br>> Sincerely,<br>> Dmitri
Kovalenko<br>><br>><br>><br><br><br>-- <br>Sincerely,<br>Dmitri Kovalenko<br><br><br><br>-- <br>Sincerely,<br>Dmitri Kovalenko<br>-------------- next part --------------<br>An HTML attachment was scrubbed...<br>URL: <<a href="http://lists.cs.uiuc.edu/pipermail/llvmdev/attachments/20140902/7bf3b7e8/attachment.html" target="_blank">http://lists.cs.uiuc.edu/pipermail/llvmdev/attachments/20140902/7bf3b7e8/attachment.html</a>><br><br>------------------------------<br><br>_______________________________________________<br>LLVMdev mailing list<br><a ymailto="mailto:LLVMdev@cs.uiuc.edu" href="mailto:LLVMdev@cs.uiuc.edu">LLVMdev@cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br><br><br>End of LLVMdev Digest, Vol 123, Issue 3<br>***************************************<br><br><br></div> </div> </div> </div> </div></body></html>