<html><head><meta http-equiv="Content-Type" content="text/html charset=us-ascii"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;">Hi Reed<div><br></div><div>You can do this on the instruction itself by telling it 2 operands must be the same register. For example, from X86:</div><div><br></div><div><div style="margin: 0px; font-size: 11px; font-family: Menlo;">let Constraints = "$src1 = $dst" in</div><div style="margin: 0px; font-size: 11px; font-family: Menlo;"> defm INSERTPS : SS41I_insertf32<0x21, "insertps">;</div><div style="margin: 0px; font-size: 11px; font-family: Menlo;"><br></div><div style="margin: 0px; font-size: 11px; font-family: Menlo;">Thanks,</div><div style="margin: 0px; font-size: 11px; font-family: Menlo;">Pete</div><div><blockquote type="cite"><div>On Jun 10, 2014, at 5:38 PM, reed kotler <<a href="mailto:rkotler@mips.com">rkotler@mips.com</a>> wrote:</div><br class="Apple-interchange-newline"><div>Does anyone know if there is a way to constrain two virtual registers to be allocated<br>to the same physical register?<br><br>Tia.<br><br>Reed<br>_______________________________________________<br>LLVM Developers mailing list<br><a href="mailto:LLVMdev@cs.uiuc.edu">LLVMdev@cs.uiuc.edu</a> <a href="http://llvm.cs.uiuc.edu">http://llvm.cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br></div></blockquote></div><br></div></body></html>