<html><head><meta http-equiv="Content-Type" content="text/html charset=windows-1252"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space;"><br><div><div>On Mar 12, 2014, at 4:55 AM, Pankaj Gode <<a href="mailto:godepankaj@yahoo.com">godepankaj@yahoo.com</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div><div style="background-color: rgb(255, 255, 255); font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; font-size: 10pt; position: static; z-index: auto;"><div>Dear All,</div><div><br></div><div style="font-size: 13.3333px; font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; background-color: transparent; font-style: normal;">I am following a flow to generate object files(.o) from input (.s assembly) files. <br>The input .s is given to AsmParser, which creates MCInst after matching instruction opcode. <br>These MCInst are converted to MCStream and then finally emitting to an object file using Target Code Emitter.</div><div style="font-size: 13.3333px; font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; background-color: transparent; font-style: normal;"><br></div>
<div>I am considering whether hazard recognition can be done on the list of MCInst, which I get after parsing .s file ??</div><div><br></div>
<div>The hazard recognition available with LLVM, uses 'scheduling DAG of
Machine Instructions' and Alias Analysis data for checking dependencies.<br>In my case, do I need to create a Schedule DAG from MCInst ? And moreover, is is possible to create a schedule DAG this way ?</div><div style="font-size: 13.3333px; font-family: HelveticaNeue, 'Helvetica Neue', Helvetica, Arial, 'Lucida Grande', sans-serif; background-color: transparent; font-style: normal;"><br></div>
<div>I have read about RevGen and other discussions, on creating LLVM IR from object code. <br>I
understood that they suggest using a 'code dictionary' to convert to
LLVM Machine Instruction & then create a CFG from the information
avaiable.<br>There are limitation to this as the IR is incomplete, as
pointed by in paper "A compiler level intermediate representation based
binary analysis and rewriting system", </div>
<div>mentioned in a discussion here (<a href="http://stackoverflow.com/questions/6981810/translation-of-machinecode-into-llvm-ir-disassembly-reassembly-of-x86-64-x86" target="_blank">http://stackoverflow.com/<wbr>questions/6981810/translation-<wbr>of-machinecode-into-llvm-ir-<wbr>disassembly-reassembly-of-x86-<wbr>64-x86</a>).</div><div style="color: rgb(0, 0, 255); font-size: 13.3333px; font-family: HelveticaNeue,Helvetica Neue,Helvetica,Arial,Lucida Grande,sans-serif; background-color: transparent; font-style: normal;"><br></div>
<div>I am not sure whether creating scheduling DAG or some intermediate representation on top of MCInst for Hazard recognition makes sense.<br>Is suggestion on the right approach ?</div></div></div></blockquote></div><br><div>I personally think the MachineInstruction IR is right representation the moment you want to work with data dependencies and control flow. i.e. it doesn’t make any sense to add these features on top of MCInst. It’s just unfortunate and accidental that you need to link in all of CodeGen to use MachineInstrs.</div><div><br></div><div>That said, the hazard checker doesn’t need this. It just looks up MC-level information and populates a table. The current interface works on SUnits and MachineInstrs because that’s what the scheduler uses. But you could easily roll you own version that works directly from MCInst.</div><div><br></div><div>-Andy</div></body></html>