<div dir="ltr"><div>Thanks. Committed as r189002.<br><br></div>Logan<br></div><div class="gmail_extra"><br><br><div class="gmail_quote">On Thu, Aug 22, 2013 at 6:21 AM, Gordon Keiser <span dir="ltr"><<a href="mailto:gkeiser@arxan.com" target="_blank">gkeiser@arxan.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div link="blue" vlink="purple" lang="EN-US"><div><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">That change seems to fix things here. Thanks!<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p><p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d">-Gordon<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1f497d"><u></u> <u></u></span></p><p class="MsoNormal"><b><span style="font-size:11.0pt;font-family:"Calibri","sans-serif"">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri","sans-serif""> <a href="mailto:llvmdev-bounces@cs.uiuc.edu" target="_blank">llvmdev-bounces@cs.uiuc.edu</a> [mailto:<a href="mailto:llvmdev-bounces@cs.uiuc.edu" target="_blank">llvmdev-bounces@cs.uiuc.edu</a>] <b>On Behalf Of </b>JF Bastien<br>
<b>Sent:</b> Wednesday, August 21, 2013 12:53 PM<br><b>To:</b> Logan Chien<br><b>Cc:</b> <a href="mailto:llvmdev@cs.uiuc.edu" target="_blank">llvmdev@cs.uiuc.edu</a></span></p><div><div class="h5"><br><b>Subject:</b> Re: [LLVMdev] Broken PLT on ARM from R183966<u></u><u></u></div>
</div><p></p><div><div class="h5"><p class="MsoNormal"><u></u> <u></u></p><div><p class="MsoNormal">I'm not very familiar with relocations but your fix looks the same as ARMTargetLowering::LowerCall, so from that perspective it lgtm (but I may be missing something).<u></u><u></u></p>
</div><div><p class="MsoNormal" style="margin-bottom:12.0pt"><u></u> <u></u></p><div><p class="MsoNormal">On Wed, Aug 21, 2013 at 8:04 AM, Logan Chien <<a href="mailto:tzuhsiang.chien@gmail.com" target="_blank">tzuhsiang.chien@gmail.com</a>> wrote:<u></u><u></u></p>
<blockquote style="border:none;border-left:solid #cccccc 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-right:0in"><div><div><p class="MsoNormal" style="margin-bottom:12.0pt">Hi Anton and JF,<u></u><u></u></p></div>
<p class="MsoNormal"> Thanks for your review. After reading the source code more carefully, I have come up with a different way fix this issue. We can simply resolve this issue by adding ARMII::MO_PLT flags with MachineInstrBuilder in FastISel pass (without failing back to DAG lowering).<br>
<br> The new patch is attached, and the test case is not changed. Sorry for your inconvenience. Please have a look. Thanks for your help.<br><br>Sincerely,<br>Logan<u></u><u></u></p></div><div><div><div><p class="MsoNormal" style="margin-bottom:12.0pt">
<u></u> <u></u></p><div><p class="MsoNormal">On Wed, Aug 21, 2013 at 10:52 PM, JF Bastien <<a href="mailto:jfb@google.com" target="_blank">jfb@google.com</a>> wrote:<u></u><u></u></p><blockquote style="border:none;border-left:solid #cccccc 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-right:0in">
<div><p class="MsoNormal">lgtm<u></u><u></u></p></div><div><div><div><p class="MsoNormal" style="margin-bottom:12.0pt"><u></u> <u></u></p><div><p class="MsoNormal">On Wed, Aug 21, 2013 at 3:18 AM, Anton Korobeynikov <<a href="mailto:anton@korobeynikov.info" target="_blank">anton@korobeynikov.info</a>> wrote:<u></u><u></u></p>
<blockquote style="border:none;border-left:solid #cccccc 1.0pt;padding:0in 0in 0in 6.0pt;margin-left:4.8pt;margin-right:0in"><p class="MsoNormal">LGTM<u></u><u></u></p><div><div><p class="MsoNormal" style="margin-bottom:12.0pt">
<br>On Wed, Aug 21, 2013 at 1:51 PM, Logan Chien <<a href="mailto:tzuhsiang.chien@gmail.com" target="_blank">tzuhsiang.chien@gmail.com</a>> wrote:<br>> Hi,<br>><br>> I have created a workaround to deal with the PIC function call. With this<br>
> patch, the FastISel will switch back to DAG lowering mechanism if (1) there<br>> is a function call in the basic block and (2) the relocation model is PIC.<br>> Please have a look. Hoping the patch will help.<br>
><br>> Sincerely,<br>> Logan<br>><br>><br>> On Wed, Aug 21, 2013 at 10:17 AM, Gordon Keiser <<a href="mailto:gkeiser@arxan.com" target="_blank">gkeiser@arxan.com</a>> wrote:<br>>><br>>> Cool, I'll file a bug tomorrow at work and add you to the CC list.<br>
>><br>>> Thanks!<br>>> Gordon Keiser<br>>> Software Development Engineer<br>>> Arxan Technologies<br>>> <a href="mailto:gkeiser@arxan.com" target="_blank">gkeiser@arxan.com</a> <a href="http://www.arxan.com" target="_blank">www.arxan.com</a><br>
>> Protecting the App EconomyT<br>>><br>>> > -----Original Message-----<br>>> > From: Eric Christopher [mailto:<a href="mailto:echristo@gmail.com" target="_blank">echristo@gmail.com</a>]<br>>> > Sent: Tuesday, August 20, 2013 9:47 PM<br>
>> > To: Gordon Keiser<br>>> > Cc: <a href="mailto:llvmdev@cs.uiuc.edu" target="_blank">llvmdev@cs.uiuc.edu</a>; JF Bastien<br>>> > Subject: Re: [LLVMdev] Broken PLT on ARM from R183966<br>>> ><br>
>> > Filing a bug would be a good start, go ahead and cc me and<br>>> > <a href="mailto:jfb@google.com" target="_blank">jfb@google.com</a>.<br>>> ><br>>> > Thanks!<br>>> ><br>>> > -eric<br>
>> ><br>>> > On Tue, Aug 20, 2013 at 6:10 PM, Gordon Keiser <<a href="mailto:gkeiser@arxan.com" target="_blank">gkeiser@arxan.com</a>><br>>> > wrote:<br>>> > > For ARM targets on linux, revision 183966 made Fast ISel default.<br>
>> > > Unfortunately, Fast ISel is broken in terms of applying the<br>>> > > ARMII::MO_PLT flags to calls in PIC mode (at least when emitting<br>>> > > assembly); it never does this. The normal ISel pass handles this<br>
>> > > situation correctly so a temporary local change to disable FastISel<br>>> > > for linux / NaCl targets is working for me right now.<br>>> > ><br>>> > ><br>>> > ><br>
>> > > I'm not very familiar with the ISel passes. I'm guessing the correct<br>>> > > thing to do here would be to apply the attribute correctly in FastISel<br>>> > > so it works, but I'm kind of unfamiliar with this part of the code and<br>
>> > > won't have time to dig into it right now, although I'm willing to do<br>>> > > it if someone points me to the right area of code.<br>>> > ><br>>> > ><br>>> > ><br>
>> > > In the meantime, would it be worthwhile to submit in a modification to<br>>> > > disable FastISel for non-darwin targets, or is it likely to be fixed<br>>> > > quickly?<br>>> > ><br>
>> > ><br>>> > ><br>>> > > -Gordon<br>>> > ><br>>> > ><br>>> > > _______________________________________________<br>>> > > LLVM Developers mailing list<br>
>> > > <a href="mailto:LLVMdev@cs.uiuc.edu" target="_blank">LLVMdev@cs.uiuc.edu</a> <a href="http://llvm.cs.uiuc.edu" target="_blank">http://llvm.cs.uiuc.edu</a><br>>> > > <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br>
>> > ><br>>><br>>> _______________________________________________<br>>> LLVM Developers mailing list<br>>> <a href="mailto:LLVMdev@cs.uiuc.edu" target="_blank">LLVMdev@cs.uiuc.edu</a> <a href="http://llvm.cs.uiuc.edu" target="_blank">http://llvm.cs.uiuc.edu</a><br>
>> <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br>><br>><br>><br>> _______________________________________________<br>
> LLVM Developers mailing list<br>> <a href="mailto:LLVMdev@cs.uiuc.edu" target="_blank">LLVMdev@cs.uiuc.edu</a> <a href="http://llvm.cs.uiuc.edu" target="_blank">http://llvm.cs.uiuc.edu</a><br>> <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br>
><br><br><br><u></u><u></u></p></div></div><p class="MsoNormal"><span style="color:#888888">--<br>With best regards, Anton Korobeynikov<br>Faculty of Mathematics and Mechanics, Saint Petersburg State University</span><u></u><u></u></p>
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