Hi Jakob,<br>You're the unfortunate soul who last touched the constant island pass, right? Do you happen to have any insight for Daniel?<br><br> Chad<br><br><div class="gmail_quote">On Tue, Jul 23, 2013 at 9:55 AM, Daniel Stewart <span dir="ltr"><<a href="mailto:stewartd@codeaurora.org" target="_blank">stewartd@codeaurora.org</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
<div link="blue" vlink="purple" lang="EN-US"><div><p class="MsoNormal">In looking at the code in ARMConstantislandPass.cpp::optimizeThumb2JumpTables(), I see that there is the following condition for not creating tbb-based jump tables:<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p><p class="MsoNormal"><span style="font-family:"Courier New";color:#4f6228"> // The instruction should be a tLEApcrel or t2LEApcrelJT; we want<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-family:"Courier New";color:#4f6228"> // to delete it as well.<u></u><u></u></span></p><p class="MsoNormal"><span style="font-family:"Courier New""> <b><span style="color:#984807">MachineInstr</span></b><span style="color:#984807"> </span>*LeaMI = PrevI;<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-family:"Courier New""> <b><span style="color:#e46c0a">if</span></b><span style="color:#e46c0a"> </span>((LeaMI->getOpcode() != <b><span style="color:#984807">ARM</span></b>::tLEApcrelJT &&<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-family:"Courier New""> LeaMI->getOpcode() != <b><span style="color:#984807">ARM</span></b>::t2LEApcrelJT) ||<u></u><u></u></span></p><p class="MsoNormal"><span style="font-family:"Courier New""> LeaMI->getOperand(<span style="color:#376092">0</span>).getReg() != BaseReg)<u></u><u></u></span></p>
<p class="MsoNormal"><span style="font-family:"Courier New""> OptOk = <b><span style="color:#e46c0a">false</span></b>;<u></u><u></u></span></p><p class="MsoNormal"><span style="font-family:"Courier New""><u></u> <u></u></span></p>
<p class="MsoNormal"><span style="font-family:"Courier New""> <b><span style="color:#e46c0a">if</span></b><span style="color:#e46c0a"> </span>(!OptOk)<u></u><u></u></span></p><p class="MsoNormal"><span style="font-family:"Courier New""> <b><span style="color:#e46c0a">continue</span></b>;<u></u><u></u></span></p>
<p class="MsoNormal"><u></u> <u></u></p><p class="MsoNormal">I am trying to figure out why the restriction of LeaMI->getOperand(0).getReg() != BaseReg is there. It seems this is overly restrictive. For example, here is a case where it succeeds:<u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p><p class="MsoNormal" style="background:white"><span style="font-size:10.0pt;font-family:"Courier New"">8944B BB#53: derived from LLVM BB %172<u></u><u></u></span></p><p class="MsoNormal" style="background:white">
<span style="font-size:10.0pt;font-family:"Courier New""> Live Ins: %R4 %R6 %D8 %Q5 %R9 %R7 %R8 %R10 %R5 %R11<u></u><u></u></span></p><p class="MsoNormal" style="background:white"><span style="font-size:10.0pt;font-family:"Courier New""> Predecessors according to CFG: BB#52<u></u><u></u></span></p>
<p class="MsoNormal" style="background:white"><span style="font-size:10.0pt;font-family:"Courier New"">8976B %R1<def> = t2LEApcrelJT <jt#2>, 2, pred:14, pred:%noreg<u></u><u></u></span></p>
<p class="MsoNormal" style="background:white"><span style="font-size:10.0pt;font-family:"Courier New"">8992B %R1<def> = t2ADDrs %R1<kill>, %R10, 18, pred:14, pred:%noreg, opt:%noreg<u></u><u></u></span></p>
<p class="MsoNormal" style="background:white"><span style="font-size:10.0pt;font-family:"Courier New"">9004B %LR<def> = t2MOVi 1, pred:14, pred:%noreg, opt:%noreg<u></u><u></u></span></p><p class="MsoNormal" style="background:white">
<span style="font-size:10.0pt;font-family:"Courier New"">9008B t2BR_JT %R1<kill>, %R10<kill>, <jt#2>, 2<u></u><u></u></span></p><p class="MsoNormal" style="background:white"><span style="font-size:10.0pt;font-family:"Courier New""><u></u> <u></u></span></p>
<p class="MsoNormal" style="background:white"><span style="font-size:10.0pt;font-family:"Courier New"">Shrink JT: t2BR_JT %R1<kill>, %R10<kill>, <jt#2>, 2<u></u><u></u></span></p><p class="MsoNormal" style="background:white">
<span style="font-size:10.0pt;font-family:"Courier New""> addr: %R1<def> = t2ADDrs %R1<kill>, %R10, 18, pred:14, pred:%noreg, opt:%noreg<u></u><u></u></span></p><p class="MsoNormal" style="background:white">
<span style="font-size:10.0pt;font-family:"Courier New""> lea: %R1<def> = t2LEApcrelJT <jt#2>, 2, pred:14, pred:%noreg<u></u><u></u></span></p><p class="MsoNormal"><u></u> <u></u></p><p class="MsoNormal">
<u></u> <u></u></p><p class="MsoNormal">From this we see that the BaseReg = R1. R1 also happens to be the register used in the t2ADDrs calculation as well as defined by the t2LEApcrelJT operation. Because R1 is defined by t2LEApcrelJT, the restriction is met. <u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p><p class="MsoNormal">However, in the next example, it fails:<u></u><u></u></p><p class="MsoNormal"><u></u> <u></u></p><p class="MsoNormal" style="background:white"><span style="font-size:10.0pt;font-family:"Courier New"">5808B BB#30: derived from LLVM BB %105<u></u><u></u></span></p>
<p class="MsoNormal" style="background:white"><span style="font-size:10.0pt;font-family:"Courier New""> Live Ins: %R4 %R6 %D8 %Q5 %R9 %R7 %R8 %R10 %R5 %R11<u></u><u></u></span></p><p class="MsoNormal" style="background:white">
<span style="font-size:10.0pt;font-family:"Courier New""> Predecessors according to CFG: BB#29<u></u><u></u></span></p><p class="MsoNormal" style="background:white"><span style="font-size:10.0pt;font-family:"Courier New"">5840B %R3<def> = t2LEApcrelJT <jt#1>, 1, pred:14, pred:%noreg<u></u><u></u></span></p>
<p class="MsoNormal" style="background:white"><span style="font-size:10.0pt;font-family:"Courier New"">5856B %R2<def> = t2ADDrs %R3<kill>, %R7, 18, pred:14, pred:%noreg, opt:%noreg<u></u><u></u></span></p>
<p class="MsoNormal" style="background:white"><span style="font-size:10.0pt;font-family:"Courier New"">5872B t2BR_JT %R2<kill>, %R7<kill>, <jt#1>, 1<u></u><u></u></span></p><p class="MsoNormal" style="background:white">
<span style="font-size:10.0pt;font-family:"Courier New""> Successors according to CFG: BB#90(17) BB#31(17) BB#32(17) BB#33(17) BB#34(17) BB#51(17)<u></u><u></u></span></p><p class="MsoNormal"><u></u> <u></u></p>
<p class="MsoNormal">Here we see that the BaseReg = R2. But the t2LEApcrelJT instruction defines R3, not R2. But this is should be fine, because the t2ADDrs instruction takes R3 and defines R2, which is the real base address. <u></u><u></u></p>
<p class="MsoNormal"><u></u> <u></u></p><p class="MsoNormal">So my question is why is the restriction <span style="font-family:"Courier New"">LeaMI->getOperand(0).getReg() != BaseReg</span> there? Shouldn’t the restriction be trying to ensure that the register defined by t2LEApcrelJT also be the register used by the t2ADDrs instruction? It seems this test is being overly restrictive.<span><font color="#888888"><u></u><u></u></font></span></p>
<span><font color="#888888"><p class="MsoNormal"><u></u> <u></u></p><p class="MsoNormal">Daniel<u></u><u></u></p></font></span></div></div><br>_______________________________________________<br>
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