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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D">Thank you, it helps!<o:p></o:p></span></p>
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</span></span></span><![endif]><span dir="LTR"></span><b><i><span style="color:#31849B"> Elena<o:p></o:p></span></i></b></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> Jim Grosbach [mailto:grosbach@apple.com]
<br>
<b>Sent:</b> Tuesday, July 16, 2013 22:57<br>
<b>To:</b> Hal Finkel; Demikhovsky, Elena<br>
<b>Cc:</b> LLVMdev List<br>
<b>Subject:</b> Re: [LLVMdev] Operand constrain specification<o:p></o:p></span></p>
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<p class="MsoNormal">On Jul 16, 2013, at 9:32 AM, Hal Finkel <<a href="mailto:hfinkel@anl.gov">hfinkel@anl.gov</a>> wrote:<o:p></o:p></p>
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<p class="MsoNormal"><span style="font-size:9.0pt">----- Original Message -----<br>
<br>
<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:9.0pt"><br>
<br>
Hi,<br>
<br>
How can I specify in a .td file that source and destination should<br>
not use the same register?<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-bottom:12.0pt"><span style="font-size:9.0pt"><br>
I think that you can use the EarlyClobber operand flag to achieve this (TableGen has an @earlyclobber constraint; there are some examples in the ARM backend).<o:p></o:p></span></p>
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<p class="MsoNormal">Yes, that’s exactly what that constraint is for.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">-Jim<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><span style="font-size:9.0pt">-Hal<br>
<br>
<br>
<o:p></o:p></span></p>
<p class="MsoNormal" style="margin-bottom:12.0pt"><span style="font-size:9.0pt"><br>
Thanks.<br>
<br>
<br>
* Elena<br>
<br>
<br>
<br>
<br>
<br>
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--<span class="apple-converted-space"> </span><br>
Hal Finkel<br>
Assistant Computational Scientist<br>
Leadership Computing Facility<br>
Argonne National Laboratory<br>
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