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On 09/05/2013 18:25, Andrew Trick wrote:<br>
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<div>On May 9, 2013, at 4:02 AM, Fraser Cormack <<a
moz-do-not-send="true" href="mailto:fraser@codeplay.com">fraser@codeplay.com</a>>
wrote:</div>
<br class="Apple-interchange-newline">
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<div style="letter-spacing: normal; orphans: auto; text-align:
start; text-indent: 0px; text-transform: none; white-space:
normal; widows: auto; word-spacing: 0px;
-webkit-text-stroke-width: 0px;">I have an instruction that
takes no operands, and produces two results, in two
consecutive cycles.<br>
<br>
I tried both of the following to my Schedule.td file:<br>
<br>
InstrItinData<IIMyInstr, [InstrStage<2,
[FuncU]>], [1, 2]>,<br>
InstrItinData<IIMyInstr, [InstrStage<1, [FuncU]>,
InstrStage<1, [FuncU]>], [1, 2]>,<br>
<br>
From what I can see in examples, these say that the first
operand is ready the cycle after issue, and the second is
ready 2 cycles after issue.<br>
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Yes, they look equivalent.</div>
<div><br>
<blockquote type="cite">
<div style="letter-spacing: normal; orphans: auto; text-align:
start; text-indent: 0px; text-transform: none; white-space:
normal; widows: auto; word-spacing: 0px;
-webkit-text-stroke-width: 0px;">But when I issue an
instruction that uses both results, it does not obey this
hazard, and is issued the cycle immediately after. Are
there any target hooks I need to implement to get this
scheduling correctly?<br>
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<div><br>
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<div>Look at -debug-only=pre-RA-sched and confirm that the DAG's
edges have the correct latency.</div>
<div><br>
</div>
<div>It also prints the current cycle count each time it
schedules an instruction.</div>
<div>DEBUG(dbgs() << "\n*** Scheduling [" <<
CurCycle << "]: ");</div>
<div><br>
</div>
<div>You should see a two cycle difference between MyInstr and
its second dependent. The scheduler won't insert nops for you.
You'd need to do that in a target-specific way.</div>
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Yes, I see the two-cycle difference between the two instructions. I
enabled the post-RA scheduler, and noticed that it cared about the
latencies, and started to rearrange the instructions accordingly. Is
it necessary to use the post-RA scheduler to enforce such latencies?<br>
<br>
<blockquote
cite="mid:B16F2509-3F97-495A-8998-6BD006D8F42F@apple.com"
type="cite">
<div>
<blockquote type="cite">
<div style="letter-spacing: normal; orphans: auto; text-align:
start; text-indent: 0px; text-transform: none; white-space:
normal; widows: auto; word-spacing: 0px;
-webkit-text-stroke-width: 0px;">I noticed that my target
was using the default HazardRecognizer, which is effectively
disabled, so I changed it to use the
ScoreboardHazardRecognizer instead. I'm also still using the
SelectionDAG scheduler, but will need to change to the MI
scheduler at some point, to keep up with trunk. Should
either of these help?<br>
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<div>The hazard recognizer won't help you. It only enforces
pipeline hazards (other instructions that need FuncU). It's
the list scheduler itself that "enforces" operand latency.</div>
<div><br>
</div>
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<br>
Ah okay, thank you.<br>
<br>
<blockquote
cite="mid:B16F2509-3F97-495A-8998-6BD006D8F42F@apple.com"
type="cite">
<div>MI scheduler allows you to use a new machine model that's
simpler for most people who don't need the precision of
Itineraries. Maybe not important in your case.</div>
<div><br>
</div>
<div>More importantly, SDScheduler is take-it-as-is, and will go
away entirely after 3.3. Whereas MI scheduler can be fixed and
improved. Now would be a good time to try switching over and
start filing bugs. PPC is an example of using MI scheduler
out-of-box. Hexagon is an example of customizing it at a high
level. You could start off like PPC with minimal customization,
but eventually you may want something in between--provide a
custom MachineSchedStrategy:</div>
<div><br>
</div>
<div>
<div>class MyScheduler : public MachineSchedStrategy {...}</div>
<div><br>
</div>
<div>namespace llvm {</div>
<div>ScheduleDAGInstrs *createMySched(MachineSchedContext *C) {</div>
<div> ScheduleDAGMI *DAG = new ScheduleDAGMI(C, new
MyScheduler());</div>
<div> DAG->addMutation(new MyDAGMutation());</div>
<div> return DAG;</div>
<div>}</div>
<div>} // namespace llvm</div>
<div><br>
</div>
<div>static MachineSchedRegistry</div>
<div>MySchedRegistry("mysched", "Custom My scheduler.",
createMySched);</div>
</div>
<div><br>
</div>
<div>-Andy</div>
<div><br>
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<br>
I've had a quick experiment with the MI Scheduler, and have a few
further questions. From what I can see, if I pass -enable-misched to
the compiler, it only works above O1, though addOptimizedRegAlloc().
Is O0 not supported without adding the pass myself in my PassConfig?<br>
<br>
How does (or will) the MI Scheduler interact with the existing SD
Scheduler? It seems as though they both run together at the moment.<br>
<br>
Thanks,<br>
Fraser<br>
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