<div dir="ltr">Duncan,<div><br></div><div>Is there a way (switch) for embedding original source code in the generated .s file?</div><div><br></div><div style>thanks,</div><div style><br></div><div style>ZY</div></div><div class="gmail_extra">
<br><br><div class="gmail_quote">On Sun, May 12, 2013 at 4:12 AM, Duncan Sands <span dir="ltr"><<a href="mailto:baldrick@free.fr" target="_blank">baldrick@free.fr</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Hi ZY,<div class="im"><br>
<br>
On 11/05/13 22:21, Zhiyuan Ren wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">
Duncan,<br>
<br>
here is part of the assembly around the problem area. I used gcc -S -flto to<br>
generate the .s file, llvm-as on the .s fiile will show error: invalid cast<br>
opcode for cast from 'i40' to 'float' %638 = trunc i40 %637 to float<br>
<br>
%633 = bitcast i8* %632 to float*<br>
%634 = bitcast float* %633 to i40*<br>
%635 = load i40* %634, align 1<br>
%636 = shl i40 %635, 7<br>
%637 = ashr i40 %636, 8<br>
%638 = trunc i40 %637 to float<br>
</blockquote>
<br></div>
this looks like a dragonegg bug. Can you please open a bugreport at<br>
<a href="http://llvm.org/bugs/" target="_blank">http://llvm.org/bugs/</a><br>
and attach the problematic Ada code. Please also indicate how you compiled<br>
it, and which version of gcc you are using.<br>
<br>
Thanks, Duncan.<br>
<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="im">
<br>
Thanks,<br>
ZY<br>
<br>
<br>
On Sat, May 11, 2013 at 3:49 PM, Duncan Sands <<a href="mailto:baldrick@free.fr" target="_blank">baldrick@free.fr</a><br></div><div class="im">
<mailto:<a href="mailto:baldrick@free.fr" target="_blank">baldrick@free.fr</a>>> wrote:<br>
<br>
Hi ZY,<br>
<br>
<br>
On 11/05/13 20:37, Zhiyuan Ren wrote:<br>
<br>
Duncan,<br>
<br>
Thanks for getting back to me. I am not sure how to find the original<br>
bitcode<br>
(and related Ada source code) that causes the truncate. This is the error<br>
message that gcc gave me when I tried to compile an Ada source file using<br>
dragonegg plugin (gcc -c -fplugin...).<br>
<br>
<br>
use -S instead of -c and add -flto<br>
The resulting .s file contains the bitcode. Please send in the file.<br>
<br>
Ciao, Duncan.<br>
<br>
<br>
ZY<br>
<br>
ps, sorry for multiple emails, trying to find out how to reply to a<br>
thread in<br>
the mailing list<br>
<br>
<br>
On Sat, May 11, 2013 at 12:42 PM, Duncan Sands <<a href="mailto:baldrick@free.fr" target="_blank">baldrick@free.fr</a><br>
<mailto:<a href="mailto:baldrick@free.fr" target="_blank">baldrick@free.fr</a>><br></div><div><div class="h5">
<mailto:<a href="mailto:baldrick@free.fr" target="_blank">baldrick@free.fr</a> <mailto:<a href="mailto:baldrick@free.fr" target="_blank">baldrick@free.fr</a>>>> wrote:<br>
<br>
Hi ZY,<br>
<br>
<br>
On 10/05/13 22:34, Zhiyuan Ren wrote:<br>
<br>
Hello, I am new to LLVM and doing some experiment with 3.2 on<br>
Ada code. Can<br>
anyone help me on the following error message?<br>
<br>
<br>
a truncate from an i32 to an f32 is not valid. This caused the<br>
code generator<br>
to abort. What is the original bitcode that caused this?<br>
<br>
Ciao, Duncan.<br>
<br>
<br>
Thanks,<br>
ZY<br>
<br>
<br>
LLVM ERROR: Cannot select: 0xa7a0bf0: f32 = truncate 0xa7a5ea8<br>
[ID=24]<br>
0xa7a5ea8: i32 = X86ISD::SHLD 0xa790280, 0xa790390,<br>
0xa76e088 [ID=22]<br>
0xa790280: i32,ch = load 0xa7386a0, 0xa7a68d8,<br>
0xa7a5628<LD1[%1482+4],<br>
anyext from i8> [ID=19]<br>
0xa7a68d8: i32 = add 0xa7a6040, 0xa7a11c8 [ID=15]<br>
0xa7a6040: i32,ch = CopyFromReg 0xa7386a0, 0xa790c98<br>
[ORD=741]<br>
[ID=12]<br>
0xa790c98: i32 = Register %vreg7 [ORD=741] [ID=3]<br>
0xa7a11c8: i32 = Constant<13> [ID=7]<br>
0xa7a5628: i32 = undef [ORD=737] [ID=2]<br>
0xa790390: i32,ch = load 0xa7386a0, 0xa7a57c0,<br>
0xa7a5628<LD4[%1482](align=1)> [ID=20]<br>
0xa7a57c0: i32 = add 0xa7a6040, 0xa7a5f30 [ID=16]<br>
0xa7a6040: i32,ch = CopyFromReg 0xa7386a0, 0xa790c98<br>
[ORD=741]<br>
[ID=12]<br>
0xa790c98: i32 = Register %vreg7 [ORD=741] [ID=3]<br>
0xa7a5f30: i32 = Constant<9> [ID=5]<br>
0xa7a5628: i32 = undef [ORD=737] [ID=2]<br>
0xa76e088: i8 = Constant<31> [ID=6]<br>
<br>
<br></div></div>
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<br>
<br>
<br>
<br>
</blockquote>
<br>
</blockquote></div><br></div>