<html>
<head>
<meta content="text/html; charset=UTF-8" http-equiv="Content-Type">
</head>
<body bgcolor="#FFFFFF" text="#000000">
<div class="moz-cite-prefix">On 03/01/2013 03:34 PM, Jiong Wang
wrote:<br>
</div>
<blockquote cite="mid:513059F7.1030008@tilera.com" type="cite">On
03/01/2013 02:57 PM, Hal Finkel wrote:
<br>
Hi Hal,
<br>
<br>
thanks for feedback.
<br>
<blockquote type="cite">Jiong, I am happy to see the Tile backend
being offered for upstream inclusion. Among other things, in the
long run, this may help inform and motivate many-core
capabilities in LLVM.
<br>
<br>
First, can you elaborate on the future maintenance and
development plans for the target code? Do you plan to add SIMD
support? Atomic memory operations?
<br>
</blockquote>
yes, currently we lack of old JIT support (I was thinking
MCJIT will be the future, but from the mailinglist archive, it
seems old JIT is still necessary), SIMD intrinsic support etc. all
these will be supported next.
<br>
</blockquote>
<br>
===> besides these, for the next step, we will support
more peephole optimizations, optimize float operation using special
hardware instruction, implement a VLIW aware MI schduler etc, to
improve instruction level parallelism. <br>
And I guess it will be interesting for how to
support higher level parallelism using TileGX's 72 core :)<span
style="color: rgb(0, 0, 0); font-family: arial; font-size: small;
font-style: normal; font-variant: normal; font-weight: normal;
letter-spacing: normal; line-height: 18px; orphans: 2; text-align:
start; text-indent: 0px; text-transform: none; white-space:
normal; widows: 2; word-spacing: 0px; -webkit-text-size-adjust:
auto; -webkit-text-stroke-width: 0px; background-color: rgb(255,
255, 255); display: inline !important; float: none; "></span><br>
<blockquote cite="mid:513059F7.1030008@tilera.com" type="cite">
<br>
As some of the llvm modules are in active development, for
example MC Layer, we want to return code to community repository
first, so that it will be easy to keep pace with llvm main tree.
<br>
<blockquote type="cite">
<br>
Will you be able to setup a buildbot on this architecture? If
so, can it be connected to the public system?
<br>
</blockquote>
yes, I guess it's OK to setup a tilegx buildbot with
connection to public system. I will confirm this with the company.
<br>
<blockquote type="cite">
<br>
On the patch itself:
<br>
<br>
1. There are still a few places where there is commented-out
code or #if 0 blocks; these should be removed (or replaced with
real comments as appropriate).
<br>
</blockquote>
thanks, I will fix these things.
<br>
<blockquote type="cite">
<br>
2. There are no regression tests -- using the test-suite is
obviously useful, but targeted regression tests are essential.
<br>
</blockquote>
yes, regression tests will be added later.
<br>
<blockquote type="cite">
<br>
You say that there are unexpected failures in the regression
tests and in the test suite. Do you understand these?
<br>
</blockquote>
yes, I have done investigation on these failures.
<br>
<br>
regression (44 failures)
<br>
===
<br>
20: caused JITTests failures, we lack old jit support
<br>
2:
<br>
MCJIT/test-common-symbols-remote.ll
<br>
MCJIT/test-fp-no-external-funcs-remote.ll
<br>
<br>
the other 20 are mostly under Clang:: Tooling (these
testcases seems to be added in this week) & some debuginfo
testcases, I will clean up them later.
<br>
<br>
<br>
test-suite (17 failures)
<br>
======
<br>
1 of them are compile stage failures
<br>
===
<br>
MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4
<br>
the reason is tilegx do not support some c99
float rounding & exceptions
<br>
we lack the support of some flag like
FE_DIVBYZERO etc, for fegetexceptflag.
<br>
<br>
16 of them are runtime failures.
<br>
===
<br>
actually, I compare all these failures with our
gcc output, it's the same.
<br>
nearly all of them are caused by float point
precision issue, for example,
<br>
<br>
MultiSource/Applications/sqlite3/
<br>
<br>
...
<br>
6|496148.333333333
<br>
-6|496234.333333333 <=== expected output & x86_64 result
<br>
+6|496234.333333334 <=== tilegx gcc/llvm result
<br>
8|496373.0
<br>
8|496448.375
<br>
1|496587.0
<br>
-6|496647.333333333
<br>
+6|496647.333333334
<br>
...
<br>
<br>
---
<br>
Regards,
<br>
Jiong
<br>
<br>
<blockquote type="cite">
<br>
-Hal
<br>
<br>
<blockquote type="cite">TILE-Gx is a VLIW architecture with
64-bit registers, 64-bit address
<br>
space,
<br>
and 64-bit instructions. TILE-Gx has load-store architecture
ISAs.
<br>
<br>
More information on the architectures is available at
<br>
<a class="moz-txt-link-freetext" href="http://www.tilera.com/scm/docs/index.html">http://www.tilera.com/scm/docs/index.html</a>.
<br>
<br>
the attached patches contains the following main features for
tilegx
<br>
backend:
<br>
<br>
1. general function.
<br>
2. PIC/TLS/JumpTable.
<br>
3. Instructoin Bundling for VLIW.
<br>
4. Basic support for Asm Parser.
<br>
5. MC Layer (aware of VLIW), MCJIT support.
<br>
<br>
I've run the regression test and standalone test-suite
natively on
<br>
TILE-Gx silicon. The
<br>
test results are:
<br>
<br>
regression
<br>
---
<br>
Expected Passes : 13218
<br>
Expected Failures : 78
<br>
Unsupported Tests : 68
<br>
Unexpected Failures: 44
<br>
<br>
test-suite
<br>
---
<br>
Expected Passes : 949
<br>
Unexpected Failures: 17
<br>
<br>
the llvm patch is against:
<br>
<br>
commit 5e812139690ce077d568ef6559992b2cf74eb536
<br>
Author: Evgeniy Stepanov <a class="moz-txt-link-rfc2396E" href="mailto:eugeni.stepanov@gmail.com"><eugeni.stepanov@gmail.com></a>
<br>
Date: Thu Feb 28 11:25:14 2013 +0000
<br>
<br>
[msan] Implement sanitize_memory attribute.
<br>
<br>
the clang patch is against:
<br>
<br>
commit a4d4621b206f941cc58d9d0bc7c67a8e705c9d49
<br>
Author: Daniel Jasper <a class="moz-txt-link-rfc2396E" href="mailto:djasper@google.com"><djasper@google.com></a>
<br>
Date: Thu Feb 28 11:05:57 2013 +0000
<br>
<br>
Improve formatting of #defines.
<br>
<br>
the test-suite patch is against:
<br>
<br>
commit 8c1ab3b660e67b74421d657408167b1345188f8d
<br>
Author: Duncan Sands <a class="moz-txt-link-rfc2396E" href="mailto:baldrick@free.fr"><baldrick@free.fr></a>
<br>
Date: Sun Feb 17 15:21:11 2013 +0000
<br>
<br>
Use LLVMCC_EMITIR_FLAG rather than -emit-llvm
<br>
<br>
<br>
please review, looking forward to your feedback.
<br>
<br>
thanks.
<br>
<br>
---
<br>
Regards,
<br>
Jiong
<br>
Tilera Corporation.
<br>
<br>
_______________________________________________
<br>
LLVM Developers mailing list
<br>
<a class="moz-txt-link-abbreviated" href="mailto:LLVMdev@cs.uiuc.edu">LLVMdev@cs.uiuc.edu</a> <a class="moz-txt-link-freetext" href="http://llvm.cs.uiuc.edu">http://llvm.cs.uiuc.edu</a>
<br>
<a class="moz-txt-link-freetext" href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a>
<br>
<br>
</blockquote>
</blockquote>
<br>
<br>
</blockquote>
<br>
<br>
<pre class="moz-signature" cols="72">--
Regards,
Jiong. Wang
Tilera Corporation.</pre>
</body>
</html>