Hi Nadav,<div><br></div><div><font><span style="line-height:normal;background-color:rgba(255,255,255,0)">Bug is reported with test cases. see <a href="http://llvm.org/bugs/show_bug.cgi?id=15124" target="_blank">http://llvm.org/bugs/show_bug.cgi?id=15124</a> .</span></font><div>
<font><span style="line-height:normal;background-color:rgba(255,255,255,0)"><br></span></font></div><div><font><span style="line-height:normal;background-color:rgba(255,255,255,0)">Please let me know if you have any thought on this.<span></span></span></font></div>
<div><font><span style="line-height:normal;background-color:rgba(255,255,255,0)"><br></span></font></div><div><font><span style="line-height:normal;background-color:rgba(255,255,255,0)">Thanks,</span></font></div><div><font><span style="line-height:normal;background-color:rgba(255,255,255,0)">-Peng</span></font></div>
<br>On Friday, February 8, 2013, Nadav Rotem wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Hi Peng,<br>
<br>
Can you please open a bugzilla and attache the LL file ? Can you please reproduce it on ToT ?<br>
<br>
Thanks,<br>
Nadav<br>
<br>
On Feb 7, 2013, at 9:08 PM, Peng Cheng <<a>gm4cheng@gmail.com</a>> wrote:<br>
<br>
> I have an llvm ir, which generates the following machine code using llc (llvm 3.0 on win32) after # *** IR Dump After X86 DAG->DAG Instruction Selection ***:<br>
><br>
> The first three lines and the last two lines alone together are used to compute "sin" for some double number.<br>
><br>
> - line 1: move the stack pointer down 8<br>
> - line 2: copy the updated stack pointer to a base register<br>
> - line 3: copy a double number to location pointed by the base register<br>
><br>
> - line end-1: to the last call "sin" to compute the result<br>
> - line end: move the stack pointer up 8<br>
><br>
> The problem is that there are many other instructions inserted between them, and these instructions include stack allocations. This causes:<br>
><br>
> 1. "sin" function gets the wrong value to compute because the stack pointer moves and wrong value is received.<br>
> 2. the function call after line end could get wrong values because after line end the stack pointer is pointing to useful data.<br>
><br>
> Could anyone working on x86 instruction selection give some pointers to prevent this?<br>
><br>
> Thanks,<br>
> -Peng<br>
><br>
><br>
> ADJCALLSTACKDOWN32 8, %ESP<imp-def,dead>, %EFLAGS<imp-def,dead>, %ESP<imp-use> ; line 1<br>
> %vreg187<def> = COPY %ESP; GR32:%vreg187 ; line 2<br>
> MOVSDmr %vreg187, 1, %noreg, 0, %noreg, %vreg36; mem:ST8[Stack] GR32:%vreg187 FR64:%vreg36 ; line 3<br>
> %vreg188<def> = MOV32rm %vreg112, 1, %noreg, 252, %noreg; mem:LD4[%108] GR32:%vreg188,%vreg112<br>
> %vreg189<def> = MOV32rm %vreg112, 1, %noreg, 256, %noreg; mem:LD4[%111] GR32:%vreg189,%vreg112<br>
> %vreg190<def> = MOVSDrm <fi#0>, 1, %noreg, 120, %noreg; mem:LD8[%85] FR64:%vreg190<br>
> %vreg191<def> = MOVSDrm <fi#0>, 1, %noreg, 96, %noreg; mem:LD8[%87] FR64:%vreg191<br>
> %vreg192<def> = MOVSDrm <fi#0>, 1, %noreg, 88, %noreg; mem:LD8[%92] FR64:%vreg192<br>
> %vreg193<def> = MOVSDrm <fi#0>, 1, %noreg, 24, %noreg; mem:LD8[%89] FR64:%vreg193<br>
> %vreg194<def> = MOVSDrm <fi#0>, 1, %noreg, 80, %noreg; mem:LD8[%94] FR64:%vreg194<br>
> %vreg195<def> = MOV32ri 8; GR32:%vreg195<br>
> %EAX<def> = COPY %vreg195; GR32:%vreg195<br>
> WIN_ALLOCA %EAX<imp-def,dead>, %ESP<imp-def,dead>, %EFLAGS<imp-def,dead>, %ESP<imp-use><br>
> %vreg196<def> = COPY %ESP; GR32:%vreg196<br>
> MOV32mr %vreg196, 1, %noreg, 0, %noreg, %vreg16; mem:ST4[%114] GR32:%vreg196,%vreg16<br>
> %vreg197<def> = MOV32ri 72; GR32:%vreg197<br>
> %EAX<def> = COPY %vreg197; GR32:%vreg197<br>
> WIN_ALLOCA %EAX<imp-def,dead>, %ESP<imp-def,dead>, %EFLAGS<imp-def,dead>, %ESP<imp-use><br>
> %vreg198<def> = COPY %ESP; GR32:%vreg198<br>
> MOVSDmr %vreg198, 1, %noreg, 56, %noreg, %vreg194; mem:ST8[%116+56] GR32:%vreg198 FR64:%vreg194<br>
> MOVSDmr %vreg198, 1, %noreg, 64, %noreg, %vreg17; mem:ST8[%116+64] GR32:%vreg198 FR64:%vreg17<br>
> MOVSDmr %vreg198, 1, %noreg, 48, %noreg, %vreg192; mem:ST8[%116+48] GR32:%vreg198 FR64:%vreg192<br>
> MOVSDmr %vreg198, 1, %noreg, 32, %noreg, %vreg191; mem:ST8[%116+32] GR32:%vreg198 FR64:%vreg191<br>
> MOVSDmr %vreg198, 1, %noreg, 24, %noreg, %vreg36; mem:ST8[%116+24] GR32:%vreg198 FR64:%vreg36<br>
> MOVSDmr %vreg198, 1, %noreg, 16, %noreg, %vreg190; mem:ST8[%116+16] GR32:%vreg198 FR64:%vreg190<br>
> MOVSDmr %vreg198, 1, %noreg, 8, %noreg, %vreg190; mem:ST8[%116+8] GR32:%vreg198 FR64:%vreg190<br>
> MOVSDmr %vreg198, 1, %noreg, 0, %noreg, %vreg190; mem:ST8[%116] GR32:%vreg198 FR64:%vreg190<br>
> %vreg199<def> _______________________________________________<br>
> LLVM Developers mailing list<br>
> <a href="javascript:;" onclick="_e(event, 'cvml', 'LLVMdev@cs.uiuc.edu')">LLVMdev@cs.uiuc.edu</a> <a href="http://llvm.cs.uiuc.edu" target="_blank">http://llvm.cs.uiuc.edu</a><br>
> <a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" target="_blank">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br>
<br>
</blockquote></div>