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<p>Hi,</p>
<p>clang -O3 -target thumbv7-eabi -emit-llvm ...</p>
<p>llc ... -debug -O3 -code-model=small -march=thumb -mcpu=cortex-m3 ...</p>
<p>Does generate slightly better code, but it still computes 7 xor + 7 and.</p>
<p>Anyway this should be a target independent optimization isn't it ??</p>
<p>Cheers Sebastien</p>
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<p>On 2013-02-04 16:46, Bill Wendling wrote:</p>
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<pre>Have you tried armv7?
-bw
On Feb 2, 2013, at 3:50 PM, <a href="mailto:matic@nimp.co.uk">matic@nimp.co.uk</a>wrote:</pre>
<blockquote type="cite" style="padding-left:5px; border-left:#1010ff 2px solid; margin-left:5px; width:100%">I gave the following function to IAR compiler (targeting CortexM0) and to clang/LLVM 3.2 (clang -O3 -target thumbv6-eabi -emit-llvm) int calleeSave8(int in[]){ int out=0; int i; for(i=0;i<8;i++){ out ^= in[i] & in[(i+1)%8]; }//expand to out = (in[0]&in[1])^(in[1]&in[2])^(in[2]&in[3])^(in[3]&in[4])^(in[4]&in[5])^(in[5]&in[6])^(in[6]&in[7])^(in[7]&in[0]) return out; } In such case, IAR compiler is able to factor out half of the and operations so it performs 4 and + 7 xor, LLVM factored only one and operation so it performs 7 and + 7 xor. (I looked at IR code and assembly output) Did I miss some option that would improve the result ? My understanding is that this kind of optimization should be done by the target independent part of the code generator, backends should not have to implement such optimization right ? Cheers, Sebastien</blockquote>
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