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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Liu,<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'> I do not think there is a trivial way to do it. Do you really _<i>have</i>_ to have those instructions together, or mere order is enough?<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Also, how much performance are you willing to sacrifice to do what you do? Maybe turning off scheduling all together is an acceptable solution?<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Sergei<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><div><p class=MsoNormal><span style='font-size:10.5pt;font-family:Consolas;color:#1F497D'>---<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:10.5pt;font-family:"Calibri","sans-serif";color:#1F497D'>Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation</span><span style='font-size:10.5pt;font-family:Consolas;color:#1F497D'><o:p></o:p></span></p></div><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><div style='border:none;border-left:solid blue 1.5pt;padding:0in 0in 0in 4.0pt'><div><div style='border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0in 0in 0in'><p class=MsoNormal><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> llvmdev-bounces@cs.uiuc.edu [mailto:llvmdev-bounces@cs.uiuc.edu] <b>On Behalf Of </b>Xu Liu<br><b>Sent:</b> Friday, January 04, 2013 11:38 AM<br><b>To:</b> llvmdev@cs.uiuc.edu<br><b>Subject:</b> [LLVMdev] instruction scheduling issue<o:p></o:p></span></p></div></div><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Hi all,<o:p></o:p></p><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>I'm trying to insert a function call "llvm_memory_profiling " right before each memory access. The function uses the effective address of the memory access as its single parameter.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>A example is as follows: the function call at 402a99 has a parameter passed to %rdi at 402a91. One can see that the function call is exactly before the <o:p></o:p></p></div><div><p class=MsoNormal>memory access I want to monitor because the effective address used by 402a9e is passed to the function call.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><div><p class=MsoNormal> 402a91: 48 8d bc 1c 48 02 00 lea <span style='color:#B70F0A'>0x248(%rsp,%rbx,1),</span>%rdi<o:p></o:p></p></div><div><p class=MsoNormal> 402a98: 00<o:p></o:p></p></div><div><p class=MsoNormal> 402a99: e8 82 e0 ff ff callq 400b20 <llvm_memory_profiling@plt><o:p></o:p></p></div><div><p class=MsoNormal>/home/xl10/llvm/test//luleshOMP-0611.cc:1974<o:p></o:p></p></div><div><p class=MsoNormal> 402a9e: f2 0f 10 84 1c 48 02 movsd <span style='color:#B70F0A'>0x248(%rsp,%rbx,1)</span>,%xmm0<o:p></o:p></p></div><div><p class=MsoNormal> 402aa5: 00 00<o:p></o:p></p></div><div><p class=MsoNormal> 402aa7: f2 0f 11 84 24 b8 01 movsd %xmm0,0x1b8(%rsp)<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>However, due to instruction scheduling, the following instruction of the function call is not always the desired memory access instruction. For example, <o:p></o:p></p></div><div><p class=MsoNormal>in the following code, the memory access is at 402afa, not right next to the function call at 402aed.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><div><p class=MsoNormal>/home/xl10/llvm/test//luleshOMP-0611.cc:1972 <o:p></o:p></p></div><div><p class=MsoNormal> 402ae5: 48 8d bc 1c 08 02 00 lea 0x208(%rsp,%rbx,1),%rdi <o:p></o:p></p></div><div><p class=MsoNormal> 402aec: 00 <o:p></o:p></p></div><div><p class=MsoNormal> 402aed: e8 2e e0 ff ff callq 400b20 <llvm_memory_profiling@plt> <o:p></o:p></p></div><div><p class=MsoNormal> 402af2: 48 8d bc 1c c8 02 00 lea 0x2c8(%rsp,%rbx,1),%rdi <o:p></o:p></p></div></div><div><div><p class=MsoNormal> 402af9: 00<o:p></o:p></p></div><div><p class=MsoNormal>/home/xl10/llvm/test//luleshOMP-0611.cc:1975<o:p></o:p></p></div><div><p class=MsoNormal> 402afa: f2 0f 10 84 1c 08 02 movsd 0x208(%rsp,%rbx,1),%xmm0<o:p></o:p></p></div><div><p class=MsoNormal> 402b01: 00 00<o:p></o:p></p></div></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>Could anyone point me how to solve this problem by modifying the instruction scheduling module in LLVM to make sure the function call instruction and the <o:p></o:p></p></div><div><p class=MsoNormal>memory access instruction next to each other? Thank you very much.<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><div><div><div><p class=MsoNormal>Best regards,<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div><div><p class=MsoNormal>Xu Liu<o:p></o:p></p></div><div><p class=MsoNormal><o:p> </o:p></p></div></div><p class=MsoNormal><o:p> </o:p></p></div><p class=MsoNormal style='margin-bottom:12.0pt'><o:p> </o:p></p></div><p class=MsoNormal><o:p> </o:p></p></div></div></div></body></html>