Hi Susan,<div><br></div><div>I'm having trouble reproducing that error on my end, but I think the problem is probably that you're not using the VirtRegRewriter infrastructure. What your allocator needs to do is populate the virtual register mapping (VirtRegMap pass) with your allocation, rather than rewriting the registers directly through MachineRegisterInfo.</div>
<div><br></div><div>Have your allocator require and preserve the VirtRegMap pass, then in your runOnMachineFunction pass grab a reference to the pass with:</div><div><br></div><div><font face="courier new, monospace">VirtRegMap &vrm = getAnalysis<VirtRegMap>();</font></div>
<div><br></div><div>You can then describe your register allocations with:</div><div><br></div><div><font face="courier new, monospace">vrm.assignVirt2Phys(<virtreg>, <physreg>)</font></div><div><br></div><div>
The VirtRegRewriter pass (in VirtRegMap.cpp) will run after your allocator and apply the mapping that you described in the VirtRegMap.</div><div><br></div><div>I hope this helps. Let me know if it doesn't fix your issue.</div>
<div><br></div><div>Cheers,</div><div>Lang.</div><div><br><div class="gmail_quote">On Wed, Oct 31, 2012 at 3:54 PM, Susan Horwitz <span dir="ltr"><<a href="mailto:horwitz@cs.wisc.edu" target="_blank">horwitz@cs.wisc.edu</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Thanks Lang!<br>
<br>
Here's another question: I'm trying to process this input:<br>
<br>
int main() {<br>
return 0;<br>
}<br>
<br>
but I'm getting an error<br>
Assertion `!Fn.getRegInfo().<u></u>getNumVirtRegs() && "Regalloc must assign all vregs"' failed.<br>
<br>
At the start of runOnMachineFunction I call Fn.getRegInfo().<u></u>getNumVirtRegs();<br>
and find that there is 1 virtual register. However, MRI->reg_empty(vreg)<br>
tells me that it is not used or defined. So my register-allocation code never sees it, and thus can't allocate a preg for it. I tried using MRI->replaceRegWith(vreg, preg);<br>
(where preg is available to vreg's register class) but that didn't work. When I look, the number of vregs in the function is still 1.<br>
<br>
Can you help with this?<br>
<br>
Thanks again!<br>
<br>
Susan<div class="im"><br>
<br>
On 10/31/2012 04:55 PM, Lang Hames wrote:<br>
</div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div class="im">
Hi Susan,<br>
<br>
The meaning of "addRequired(X)" is that your pass needs X to be run, and<br>
for X to be preserved by all passes that run after X and before your<br>
pass. The PHIElemination and TwoAddressInstruction passes do not<br>
preserve each other, hence there's no way for the pass manager to<br>
schedule them for you if you addRequire(...) them.<br>
<br>
The trick is that CodeGen will schedule both of these passes to be run<br>
before _any_ register allocation pass (see Passes.cpp), so you needn't<br>
require them explicitly - you can just assume they have been run. If you<br>
just remove those lines from your getAnalysisUsage method your pass<br>
should now run as you expect.<br>
<br>
Cheers,<br>
Lang.<br>
<br>
On Wed, Oct 31, 2012 at 1:46 PM, Susan Horwitz <<a href="mailto:horwitz@cs.wisc.edu" target="_blank">horwitz@cs.wisc.edu</a><br></div><div class="im">
<mailto:<a href="mailto:horwitz@cs.wisc.edu" target="_blank">horwitz@cs.wisc.edu</a>>> wrote:<br>
<br>
I'm trying to write a MachineFunctionPass to do register allocation.<br>
I have code that worked with an old version of LLVM. It does not<br>
work with llvm-3.1. (or various other versions that I've tried).<br>
<br>
The first problem is that including this line:<br>
<br></div>
AU.addRequiredID(__<u></u>TwoAddressInstructionPassID);<div class="im"><br>
<br>
in method getAnalysisUsage causes a runtime error:<br>
<br>
Unable to schedule 'Eliminate PHI nodes for register allocation'<br>
required by 'Unnamed pass: implement Pass::getPassName()'<br>
Unable to schedule pass<br>
UNREACHABLE executed at ...<br>
<br>
I'm invoking the pass like this (given input file foo.c):<br>
<br>
clang -emit-llvm -O0 -c foo.c -o foo.bc<br>
opt -mem2reg foo.bc > foo.ssa<br>
mv foo.ssa foo.bc<br>
llc -load Debug/lib/P4.so -regalloc=gc foo.bc<br>
<br>
<br>
I've attached my entire file (it's very short). Any help would be<br>
much appreciated!<br>
<br>
Susan Horwitz<br>
<br>
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