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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='color:#1F497D'>Preston, <o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='color:#1F497D'> If it is not in itself obvious… With somewhat high degree of certainty you need to look at the scheduling DAG going into the Post-RA scheduler. If these two SUs do not have a chain edge between them, scheduler is free to reorder them.<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'>Why they do not have an edge – it could be a number of reasons – from AA telling dag constructor so, to a bug in the dag construction logic. Hope this does not sound too trivial </span><span style='font-family:Wingdings;color:#1F497D'>J</span><span style='color:#1F497D'><o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='color:#1F497D'>Sergei<o:p></o:p></span></p><p class=MsoNormal><span style='color:#1F497D'><o:p> </o:p></span></p><div><p class=MsoNormal><span style='font-size:10.5pt;font-family:Consolas;color:#1F497D'>---<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:10.5pt;color:#1F497D'>Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation</span><span style='font-size:10.5pt;font-family:Consolas;color:#1F497D'><o:p></o:p></span></p></div><p class=MsoNormal><span style='color:#1F497D'><o:p> </o:p></span></p><div style='border:none;border-left:solid blue 1.5pt;padding:0in 0in 0in 4.0pt'><div><div style='border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0in 0in 0in'><p class=MsoNormal><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> llvmdev-bounces@cs.uiuc.edu [mailto:llvmdev-bounces@cs.uiuc.edu] <b>On Behalf Of </b>Gurd, Preston<br><b>Sent:</b> Wednesday, October 17, 2012 5:34 PM<br><b>To:</b> LLVMdev (LLVMdev@cs.uiuc.edu)<br><b>Subject:</b> [LLVMdev] Problem with PostRASchedulerList.cpp - advice wanted<o:p></o:p></span></p></div></div><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>When you compile the attached file using<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal> <span style='font-family:"Courier New"'>llc -march=x86 -mcpu=atom sched-bug.ll -o –<o:p></o:p></span></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>The Post-RA scheduler changes the sequence<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal style='text-indent:.5in'><span style='font-family:"Courier New"'>movl %ecx, (%esp)<o:p></o:p></span></p><p class=MsoNormal><span style='font-family:"Courier New"'> bsfl (%esp),%eax # this came from inline assembly code</span><o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>to read<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal> <span style='font-family:"Courier New"'>bsfl (%esp),%eax # this came from inline assembly code<o:p></o:p></span></p><p class=MsoNormal style='text-indent:.5in'><span style='font-family:"Courier New"'>movl %ecx, (%esp)<o:p></o:p></span></p><p class=MsoNormal style='text-indent:.5in'><o:p> </o:p></p><p class=MsoNormal>This is an incorrect schedule, because it seems the scheduler is not aware that the memory load by the <span style='font-family:"Courier New"'>bsfl</span> depends on the memory store by the <span style='font-family:"Courier New"'>movl</span>. <o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>If you are familiar with the Post-RA scheduler works, then I would appreciate any suggestions you might have as to how I could fix this problem, such as by treating inline assembly code as a barrier or by including memory references in scheduling decisions.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Thanks,<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Preston G<o:p></o:p></p><p class=MsoNormal style='text-indent:.5in'><o:p> </o:p></p><p class=MsoNormal>--<o:p></o:p></p><p class=MsoNormal>Preston Gurd <<a href="mailto:preston.gurd@intel.com">preston.gurd@intel.com</a>><o:p></o:p></p><p class=MsoNormal> Intel Waterloo<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p></div></div></body></html>