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</o:shapelayout></xml><![endif]--></head><body bgcolor=white lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal style='margin-bottom:12.0pt'><br>> Normally there is a 64 bit register that is the result of certain multiply and divide instructions.<br>>It's really 2 32 bit registers.<br>><br>>This is like HI[0]/Lo[0]<br>><br>>In fact there are four such pairs, only the 0th pair available to basic multiply and divide.<br>><br>>But DSP instructions have access to 4 , Hi[i],Lo[i], i=0..3<br>><br>>We want the register allocator to allocate them for us but also we need to have them paired,<br>>i.e. Hi[1],Lo[1]<br><br>>So in principle if you have a 64 bit register you can have two 32 bit registers inside.<o:p></o:p></p><p class=MsoNormal>Look at the Hexagon backend which also has 64 bit register pairs and only successive even-odd 32 bit registers can be paired together.<o:p></o:p></p><p class=MsoNormal><br>>If you tell the register allocator that you have 64 bit registers, then it wants to assume that 64 bit<br>>is a legal operand type and then llvm assumes that you have native instructions for all the 64 bit<br>>types, and we don't have that in mips32, for example. So you would have to lower them all yourself.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Even in Hexagon, not all operations are legal on i64. So, like Michael said, you should “setOperationAction” for those operations (and i64) to “Expand”.<o:p></o:p></p><p class=MsoNormal>However, I am guessing, in your case, you have more operations that are illegal than ones that are legal for i64 types ?<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Pranav<o:p></o:p></p><p class=MsoNormal>Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, hosted by The Linux Foundation<o:p></o:p></p></div></body></html>