<html><head><meta http-equiv="Content-Type" content="text/html charset=utf-8"><base href="x-msg://65790/"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><div>Hi Vladimir,</div><div><br></div><div>The pass you refer to isn't used by the assembler at all. That's strictly a compiler codegen thing. The assembler equivalents are expressed via InstAlias constructions. Again, though, those are for a single output instruction, so you need something more. Sprecifically, you can handle assembly pseudo-instructions in C++ code. Something like the ARM assembler's processInstruction() hook would be an appropriate place.</div><div><br></div><div>-Jim</div><div><br></div><br><div><div>On Aug 9, 2012, at 3:26 AM, "Medic, Vladimir" <<a href="mailto:vmedic@mips.com">vmedic@mips.com</a>> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><div ocsi="0" fpstyle="1" style="font-family: Helvetica; font-size: medium; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-align: -webkit-auto; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px; "><div style="direction: ltr; font-family: Tahoma; font-size: 10pt; ">Hi all,<br>I'm trying to solve a problem that we have in implementation of the assembler for Mips platform in llvm. Mips has some pseudo instructions that, depending on the arguments can be emitted as one or more real instructions by the assembler.<span class="Apple-converted-space"> </span><br><pre class="bz_comment_text" id="comment_text_0"><font face="Tahoma">For example load immediate instruction can have multiple expansions depending on a size of immediate operand:
This expansion is for 0 ≤ j ≤ 65535.</font>
li d,j =>
ori d,$zero,j
<font face="Tahoma">This one is for −32768 ≤ j < 0.</font>
li d,j =>
addiu d,$zero,j
<font face="Tahoma">This one is for any other value of j that is representable as a 32-bit integer.</font>
li d,j =>
lui d,hi16(j)
ori d,d,lo16(j)</pre><font face="Tahoma">I have found that class PseudoLoweringEmitter emits code which deals with PseudoInstExpansion.<span class="Apple-converted-space"> </span></font><font face="Tahoma">This sounds like exactly what we need , but</font><font face="Tahoma">, as stated in comment in PseudoLoweringEmitter.cpp:<span class="Apple-converted-space"> </span><br>// FIXME: This pass currently can only expand a pseudo to a single instruction.<span class="Apple-converted-space"> </span><br>// The pseudo expansion really should take a list of dags, not just<span class="Apple-converted-space"> </span><br>// a single dag, so we can do fancier things.<span class="Apple-converted-space"> </span><br><br>Are the 'fancier things' mentioned in the comment</font><span class="Apple-converted-space"> </span>things that we need, expansion to a multiple instructions and could they use operand values as conditions for different expansions?<br>Could it work for inline asm in C code, with/without direct-object emitter?<br><br>Kind Regards<br><br>Vladimir<br></div>_______________________________________________<br>LLVM Developers mailing list<br><a href="mailto:LLVMdev@cs.uiuc.edu">LLVMdev@cs.uiuc.edu</a><span class="Apple-converted-space"> </span> <a href="http://llvm.cs.uiuc.edu">http://llvm.cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br></div></blockquote></div><br></body></html>