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<div style="direction: ltr;font-family: Tahoma;color: #000000;font-size: 10pt;">I'm trying to implement the standalone assembler for mips and I have encountered a problem in instruction operands matcher.<br>
In mips instruction set there are math instructions with two format flags in the mnemonic, one for source and one for destination register.<br>
For example <span style="font-family: Courier New;">ceil.w.s</span> means both source and destination are F32 registers while<span style="font-family: Courier New;"> ceil.l.d
</span>means both source and destination are F64 registers. Also, depending on the floating point unit configuration F64 may be either single 64 bit register or a pair of 32 bit registers. In the current implementation this instruction is defined as follows:<br>
<br>
<span style="font-family: Courier New;">// Instructions that convert an FP value to 64-bit fixed point.</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;">let Predicates = [IsFP64bit], DecoderNamespace = "Mips64" in</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;">multiclass FFR1_L_M<bits<6> funct, string opstr> {</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> def _S : FFR1<funct, 16, opstr, "l.s", FGR64, FGR32>;</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> def _D64 : FFR1<funct, 17, opstr, "l.d", FGR64, FGR64>;</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;">}</span><br style="font-family: Courier New;">
<br style="font-family: Courier New;">
<span style="font-family: Courier New;">// Instructions that convert an FP value to 32-bit fixed point.</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;">multiclass FFR1_W_M<bits<6> funct, string opstr> {</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> def _S : FFR1<funct, 16, opstr, "w.s", FGR32, FGR32>;</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> def _D32 : FFR1<funct, 17, opstr, "w.d", FGR32, AFGR64>,</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> Requires<[NotFP64bit]>;</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> def _D64 : FFR1<funct, 17, opstr, "w.d", FGR32, FGR64>,</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> Requires<[IsFP64bit]> {</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> let DecoderNamespace = "Mips64";</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> }</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;">}</span><br style="font-family: Courier New;">
<br style="font-family: Courier New;">
<span style="font-family: Courier New;">defm CEIL_W : FFR1_W_M<0xe, "ceil">;</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;">defm CEIL_L : FFR1_L_M<0xa, "ceil">;</span><br>
<br>
When assembly matcher is generated these are created as five instructions, each having 'ceil' as mnemonic:<br>
<br>
<span style="font-family: Courier New;">static const MatchEntry MatchTable[277] = {</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;">.</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;">.</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;">.</span><br style="font-family: Courier New;">
<br style="font-family: Courier New;">
<span style="font-family: Courier New;"> { Mips::CEIL_L_D64, 93 /* ceil */, Convert__Reg1_2__Reg1_3, { MCK__DOT_l, MCK__DOT_d, MCK_FGR64, MCK_FGR64 }, Feature_IsFP64bit, 0},</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> { Mips::CEIL_L_S, 93 /* ceil */, Convert__Reg1_2__Reg1_3, { MCK__DOT_l, MCK__DOT_s, MCK_FGR64, MCK_FGR32 }, Feature_IsFP64bit, 0},</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> { Mips::CEIL_W_D64, 93 /* ceil */, Convert__Reg1_2__Reg1_3, { MCK__DOT_w, MCK__DOT_d, MCK_FGR32, MCK_FGR64 }, Feature_IsFP64bit, 0},</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> { Mips::CEIL_W_D32, 93 /* ceil */, Convert__Reg1_2__Reg1_3, { MCK__DOT_w, MCK__DOT_d, MCK_FGR32, MCK_AFGR64 }, Feature_NotFP64bit, 0},</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> { Mips::CEIL_W_S, 93 /* ceil */, Convert__Reg1_2__Reg1_3, { MCK__DOT_w, MCK__DOT_s, MCK_FGR32, MCK_FGR32 }, 0, 0},</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;">.</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;">.</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;">.</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;">}</span><br>
<br>
So, when the MatchInstructionImpl is called it seems to look for a pair of instructions that match the mnemonic:<br>
<br>
<span style="font-family: Courier New;"> // Search the table.</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> std::pair<const MatchEntry*, const MatchEntry*> MnemonicRange =</span><br style="font-family: Courier New;">
<span style="font-family: Courier New;"> std::equal_range(MatchTable, MatchTable+277, Mnemonic, LessOpcode());</span><br>
<br>
The search will always end in first two entries ( <span style="font-family: Courier New;">
Mips::CEIL_L_D64 and Mips::CEIL_L_S</span>) thus reporting the 'invalid operand' error when<span style="font-family: Courier New;"> ceil.w.x
</span>instruction is parsed.<br>
Is there a way to direct this search somehow, maybe to use available features or we should change the definition of the instructions to have at least one format included in mnemonic?<br>
<br>
Kind regards,<br>
Vladimir<br>
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