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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>The SA110 StrongARM is a very old ARMv4 chip. I don’t know the state of codegen for ARMv4 (I remember reading that anything below v6 was still not perfect, although v5 works very nicely here), but there’s a chance an instruction is being generated that isn’t fully ARMv4 compatible… and the ancient GCC might not recognize this properly. SimIt-ARM seems to support ARMv5, so you might try that instead.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>There are at least a couple of things wrong with the invocation when using it for this: <o:p></o:p></span></p><p class=MsoListParagraph style='text-indent:-.25in;mso-list:l0 level1 lfo1'><![if !supportLists]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><span style='mso-list:Ignore'>1)<span style='font:7.0pt "Times New Roman"'> </span></span></span><![endif]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>You should also be telling llvm-gcc that it’s targeting ARM code, and make sure it is pointing at your cross GCC’s include directories. From the command below, llvm-gcc is probably pulling in your system’s headers from /usr/include and may contain incorrect function prototypes and data sizes which could propagate into the final code. I think –nostdinc should be enough since you’re not using llvm-gcc to drive the linker. Then you can do –isystem and point it at the root “usr” dir of your crosstools or manual –I/path/to/crosstools_for/arm-linux/include … etc to get the correct ones. <o:p></o:p></span></p><p class=MsoListParagraph style='text-indent:-.25in;mso-list:l0 level1 lfo1'><![if !supportLists]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><span style='mso-list:Ignore'>2)<span style='font:7.0pt "Times New Roman"'> </span></span></span><![endif]><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>You should be passing –arch armv4 into llvm-gcc as well (at the very minimum) so it generates correct data layout settings in the bitcode, and feed LLC the entire triple to be safe. ( -mtriple=arm-linux-gnueabi ). This depends on whether or not you built llvm-gcc targeted to arm-linux or not, though. <o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>To answer your other question, there is an llvm-based project called SkyEye (<a href="http://sourceforge.net/apps/phpwebsite/skyeye/">http://sourceforge.net/apps/phpwebsite/skyeye/</a>) but I don’t know how far along it is or whether it will do what you’re looking for. <o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Cheers, <o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Gordon Keiser<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Software Development Engineer<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>Arxan Technologies, Inc.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>1305 Cumberland Ave, Ste 215<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'>West Lafayette, IN <o:p></o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></p><p class=MsoNormal><a name="_MailEndCompose"><span style='font-size:11.0pt;font-family:"Calibri","sans-serif";color:#1F497D'><o:p> </o:p></span></a></p><div><div style='border:none;border-top:solid #B5C4DF 1.0pt;padding:3.0pt 0in 0in 0in'><p class=MsoNormal><b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>From:</span></b><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'> llvmdev-bounces@cs.uiuc.edu [mailto:llvmdev-bounces@cs.uiuc.edu] <b>On Behalf Of </b>NaJeM ErMeLeH<br><b>Sent:</b> Thursday, April 12, 2012 11:13 AM<br><b>To:</b> LLVM-Forum<br><b>Subject:</b> [LLVMdev] Question::ARM simulation and cross compilation.<o:p></o:p></span></p></div></div><p class=MsoNormal><o:p> </o:p></p><div><p class=MsoNormal><span style='font-size:10.0pt;font-family:"Tahoma","sans-serif"'>Hello,<br><br>I'm trying to evaluate the performance improvement of instruction scheduling on one of the inorder ARM processor, I was looking for ARM simulator and I found two (Simplescalar/ARM and SimIt-ARM)<br>The code generated using llvm-2.9 and llvm-gcc and gcc 3.2.<br>I used these command :<br><br>$ llvm-gcc -O3 -o test1.bc -c --emit-llvm test1.c<br>$ llc -O3 -o test1.s -march=arm test1.bc -mcpu=strongarm110<br>$ arm-linux-gcc test1.s -mcpu=strongarm110 -static -O3 -o test1 <br>$ ./sim-uop test1<br><br>Unfortunately, got this message : <br><br>bogus opcode detected @ 0x00008370 [sim_main:sim-uop.c, line 497]<br><br>My questions are :<br><br>Am I doing cross compiling right? Is there a way to cross compiler using llvm-gcc?<br>Is there any modern open source ARM cycle accurate simulator that I can use with llvm-gcc?<br><br>Thanks in advance.<br><br>Regards,<br>Najem. <o:p></o:p></span></p></div></div></body></html>