<html><body><div style="color:#000; background-color:#fff; font-family:times new roman, new york, times, serif;font-size:12pt"><div style="font-family: 'times new roman', 'new york', times, serif; font-size: 12pt; "><span><br></span></div><div style="font-family: 'times new roman', 'new york', times, serif; font-size: 12pt; "><span>Hi Jim.</span></div><div style="font-family: 'times new roman', 'new york', times, serif; font-size: 12pt; "><span style="font-size: 12pt; ">I'm doing custom lowering but here I have a very basic issue and </span><span style="font-size: 12pt; ">the situation is like this -</span><br></div><div style="font-family: 'times new roman', 'new york', times, serif; font-size: 12pt; "><span style="font-size: 12pt; "><br></span></div><div style="font-family: 'times new roman', 'new york', times, serif; font-size: 12pt; "><span>[Original Op]</span></div><div style="font-family: 'times new roman', 'new york', times, serif; font-size:
12pt; "><span><span class="Apple-tab-span" style="white-space:pre"> </span>Mul Dest, Src1, Src2</span></div><div style="font-family: 'times new roman', 'new york', times, serif; font-size: 12pt; "><span><br></span></div><div style="font-family: 'times new roman', 'new york', times, serif; font-size: 12pt; "><span>[Expanded from EmitInstrWithCustomInserter]</span></div><div style="font-family: 'times new roman', 'new york', times, serif; font-size: 12pt; "><span><span class="Apple-tab-span" style="white-space:pre"> </span>Step1 Dest, Src1, Src2 <=== BuildMI(..., Step1, Dest).addReg(Src1).addReg(Src2)</span></div><div style="font-family: 'times new roman', 'new york', times, serif; font-size: 12pt; "><span><div><span><span class="Apple-tab-span" style="white-space: pre; "> </span>Step2 Dest, Src1, Src2 <=== </span><span style="font-size: 12pt; ">BuildMI(..., Step2,
Dest).addReg(Src1).addReg(Src2)</span></div><div><span><span class="Apple-tab-span" style="white-space:pre"> </span>Step3 Dest, Src2, Src1 <=== BuildMI(..., Step3, Dest).addReg(Src2).addReg(Src1)</span></div></span></div><div style="font-family: 'times new roman', 'new york', times, serif; font-size: 12pt; "><span><br></span></div><div><span style="font-size: 16px;">Could manage to skip the CSE on those steps! W</span><span style="font-size: 12pt; ">hile mul operation is expanded to multiple (3 in this case) steps, BuildMIs as above. But the "Live Intervals" computation gives a fatal error of multiple definitions on destination register (Dest), from lib/CodeGen/LiveIntervalAnalysis.cpp. Certainly those addReg seems to be done wrongly. </span><span style="font-size: 12pt; ">Any hint as to what must be the correct steps?</span></div><div><span style="font-size: 12pt; "><br></span></div><div><span style="font-size: 12pt;
">Thanks.</span></div><div><span style="font-size: 12pt; ">Girish.</span></div><div style="font-family: 'times new roman', 'new york', times, serif; font-size: 12pt; "><span><br></span></div><div style="font-family: 'times new roman', 'new york', times, serif; font-size: 12pt; "></div><div style="font-family: 'times new roman', 'new york', times, serif; font-size: 12pt; "><blockquote style="border-left: 2px solid rgb(16, 16, 255); margin-left: 5px; margin-top: 5px; padding-left: 5px;"><div style="font-size: 12pt; font-family: 'times new roman', 'new york', times, serif; "><div style="font-size: 12pt; font-family: 'times new roman', 'new york', times, serif; "><font size="2" face="Arial"> <b><span style="font-weight:bold;">From:</span></b> Jim Grosbach <grosbach@apple.com><br> <b><span style="font-weight: bold;">To:</span></b> girish gulawani <girishvg@yahoo.com> <br><b><span style="font-weight: bold;">Cc:</span></b> Johannes Birgmeier
<e0902998@student.tuwien.ac.at>; LLVM Developers Mailing List <llvmdev@cs.uiuc.edu> <br> <b><span style="font-weight: bold;">Sent:</span></b> Wednesday, 21 December 2011 11:30 PM<br> <b><span style="font-weight: bold;">Subject:</span></b> Re: [LLVMdev] Stop MachineCSE on certain instructions<br> </font> <br><div id="yiv258327980"><div>Ah, OK. I think I understand much better now. Thanks! You shouldn't need bundles for that sort of thing. A custom lowering or a fancy pattern should be sufficient, depending on the details of how your target is defined.<div><br></div><div>For patterns, looks at the various targets use of the Pat<>, Pattern<>, ComplexPattern<> and related classes in the .td files.</div><div><br></div><div><div>For examples of custom lowerings, have a look at how other targets handle any operations marked in <TargetName>ISelLowering.cpp as "Custom" operation
actions.<div><br></div><div>-Jim<br><div><br><div><div>On Dec 20, 2011, at 6:57 PM, girish gulawani wrote:</div><br class="yiv258327980Apple-interchange-newline"><blockquote type="cite"><div><div style="color: rgb(0, 0, 0); background-color: rgb(255, 255, 255); font-size: 12pt; font-family: 'times new roman', 'new york', times, serif; "><div><span><br></span></div><div><span>Hi, Jim.</span></div><div><span>In my case the target (Tilera) doesn't have a full 32-bit mult operation and to do so it has to accumulate results from three 16-bit mults, by retaining operands and the result across in the same registers. However the ISel DAG thinks its a CSE case. Please note this is not a MAdd/MSub triad.</span></div><div><span><br></span></div><div><span>How could I do this by defining such a sequence or the pattern in the .def file itself for the ISD::MUL?</span></div><div>Thanks.</div><div>Girish.</div><div><br></div><div><blockquote style="border-left:2px
solid rgb(16, 16, 255);margin-left:5px;margin-top:5px;padding-left:5px;"> <div style="font-size: 12pt; font-family: times, serif; "> <div style="font-size: 12pt; font-family: times, serif; "> <font size="2" face="Arial"> <hr size="1"> <b><span style="font-weight:bold;">From:</span></b> Jim Grosbach <<a rel="nofollow" ymailto="mailto:grosbach@apple.com" target="_blank" href="mailto:grosbach@apple.com">grosbach@apple.com</a>><br> <b><span style="font-weight:bold;">To:</span></b> girish gulawani <<a rel="nofollow" ymailto="mailto:girishvg@yahoo.com" target="_blank" href="mailto:girishvg@yahoo.com">girishvg@yahoo.com</a>> <br><b><span style="font-weight:bold;">Cc:</span></b> Johannes Birgmeier <<a rel="nofollow" ymailto="mailto:e0902998@student.tuwien.ac.at" target="_blank" href="mailto:e0902998@student.tuwien.ac.at">e0902998@student.tuwien.ac.at</a>>; LLVM Developers Mailing List <<a rel="nofollow"
ymailto="mailto:llvmdev@cs.uiuc.edu" target="_blank" href="mailto:llvmdev@cs.uiuc.edu">llvmdev@cs.uiuc.edu</a>> <br> <b><span style="font-weight:bold;">Sent:</span></b> Wednesday, 21 December 2011 12:41 AM<br> <b><span style="font-weight:bold;">Subject:</span></b> Re: [LLVMdev] Stop MachineCSE on certain instructions<br> </font> <br>Hi Girish,<br><br>Sorry, but I'm afraid I don't understand your question. Can you elaborate a bit?<br><br>-Jim<br><br>On Dec 19, 2011, at 9:12 PM, girish gulawani wrote:<br><br>> <br>> Hello Jim.<br>> Just out of curiosity, won't such mechanism work via the patterns from
instructions defs?<br>> <br>> Thanks.<br>> Girish.<br>> <br>> From: Jim Grosbach <<a rel="nofollow" ymailto="mailto:grosbach@apple.com" target="_blank" href="mailto:grosbach@apple.com">grosbach@apple.com</a>><br>> To: Johannes Birgmeier <<a rel="nofollow" ymailto="mailto:e0902998@student.tuwien.ac.at" target="_blank" href="mailto:e0902998@student.tuwien.ac.at">e0902998@student.tuwien.ac.at</a>> <br>> Cc: LLVM Developers Mailing List <<a rel="nofollow" ymailto="mailto:llvmdev@cs.uiuc.edu" target="_blank" href="mailto:llvmdev@cs.uiuc.edu">llvmdev@cs.uiuc.edu</a>> <br>> Sent: Monday, 19 December 2011 10:33 PM<br>> Subject: Re: [LLVMdev] Stop MachineCSE on certain instructions<br>> <br>> Hi Johannes,<br>> <br>> You may be interested in the (very) recently added explicit instruction bundle support. For an example of their usage, have a look at the ARM backend's IT-block (Thumb2 predication support)
pass, which uses them to tie instructions together.<br>> <br>> -Jim<br>> <br>> On
Dec 17, 2011, at 12:24 PM, Johannes Birgmeier wrote:<br>> <br>> > Hello,<br>> > <br>> > I'm writing for a backend and have a complicated instruction bundle (3 <br>> > instructions) that has to be executed like a single block (meaning: if <br>> > the first instruction is executed, all three have to be executed to <br>> > obtain the result, though not necessarily without other instructions in <br>> > between). Unfortunately, MachineCSE gets in the way sometimes and rips <br>> > it apart.<br>> > <br>> > Is there a way to stop CSE from doing its thing (common subexpression <br>> > elimination) for certain instructions?<br>> > <br>> > I've already tried glueing (gluing?) them together, but that doesn't <br>> > seem to make a difference.<br>> > <br>> > Regards,<br>> > Johannes Birgmeier<br>> > _______________________________________________<br>>
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