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<p class="MsoNormal">Here is my test case I am trying to match in as few instruction as possible, currently it takes a dozen or so.<o:p></o:p></p>
<p class="MsoNormal">define void @__OpenCL_bug7669_kernel(<4 x i16> addrspace(1)* nocapture %a) nounwind {<o:p></o:p></p>
<p class="MsoNormal">entry:<o:p></o:p></p>
<p class="MsoNormal"> store <4 x i16> <i16 0, i16 1, i16 2, i16 3>, <4 x i16> addrspace(1)* %a, align 8<o:p></o:p></p>
<p class="MsoNormal"> ret void<o:p></o:p></p>
<p class="MsoNormal">}<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal"><b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif"">From:</span></b><span style="font-size:10.0pt;font-family:"Tahoma","sans-serif""> llvmdev-bounces@cs.uiuc.edu [mailto:llvmdev-bounces@cs.uiuc.edu]
<b>On Behalf Of </b>Villmow, Micah<br>
<b>Sent:</b> Thursday, December 15, 2011 4:04 PM<br>
<b>To:</b> LLVM Developers Mailing List<br>
<b>Subject:</b> [LLVMdev] Vector immediates in tablegen w/o build_vector?<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">I have two patterns in tablegen that do look like the exact same thing:<o:p></o:p></p>
<p class="MsoNormal">Pat 1)<o:p></o:p></p>
<p class="MsoNormal"> def MOV_v4i16 : ILFormat<IL_OP_MOV, (outs GPRV4I16:$dst),<o:p></o:p></p>
<p class="MsoNormal"> (ins i16imm:$val),<o:p></o:p></p>
<p class="MsoNormal"> asm, [(set GPRV4I16:$dst, (build_vector (i16 imm:$val)))]>;<o:p></o:p></p>
<p class="MsoNormal">Pat 2)<o:p></o:p></p>
<p class="MsoNormal">def v4i16imm : Operand<v4i16>;<o:p></o:p></p>
<p class="MsoNormal"> def MOV_v4i16 : ILFormat<IL_OP_MOV, (outs GPRV4I16:$dst),<o:p></o:p></p>
<p class="MsoNormal"> (ins v4i16imm:$val),<o:p></o:p></p>
<p class="MsoNormal"> asm, [(set GPRV4I16:$dst, (v4i16 imm:$val))]>;<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">The second pattern seems to build correctly, but doesn't match because of the build_vector opcode.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">So, what I am trying to figure out, how do I get (build_vector (i16 imm:$val)) to be convert to v4i16 immediate directly?<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">I've tried pattern fragments, but I can't seem to get that to work correctly.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">I tried this:<o:p></o:p></p>
<p class="MsoNormal">def v4i16imm : Operand<v4i16>;<o:p></o:p></p>
<p class="MsoNormal">def bvimm : PatFrag<(ops node:$val), (build_vector node:$val)>;<o:p></o:p></p>
<p class="MsoNormal">def _v4i16 : ILFormat<IL_OP_MOV, (outs GPRV4I16:$dst),<o:p></o:p></p>
<p class="MsoNormal"> (ins v4i16imm:$val),<o:p></o:p></p>
<p class="MsoNormal"> asm, [(set GPRV4I16:$dst, (v4i16 (bvimm imm:$val)))]>;<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Any idea? Basically I am trying to get vector immediates to work in tablegen patterns.<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Thanks,<o:p></o:p></p>
<p class="MsoNormal">Micah<o:p></o:p></p>
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