<html><head><base href="x-msg://223/"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><br><div><div>On Nov 9, 2011, at 7:48 AM, Jonas Paulsson wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><span class="Apple-style-span" style="border-collapse: separate; font-family: Menlo; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-align: -webkit-auto; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-border-horizontal-spacing: 0px; -webkit-border-vertical-spacing: 0px; -webkit-text-decorations-in-effect: none; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px; font-size: medium; "><div class="hmmessage" style="font-size: 10pt; font-family: Tahoma; "><div dir="ltr">Hi,<br><br>I can't find a way to define a subregister in a MI, while using another subregister in the same MI.<br><br>For example:<br><br>reg:low = OP reg:hi, rhs<br><br>I really need the reg:low to be part of the same register as reg:hi</div></div></span></blockquote><div><br></div><div>LLVM doesn't support this kind of constraint in its default register allocators.</div><div><br></div><div>You may be able to get the PBQP allocator to enforce the constraint.</div><div><br></div><div>Alternatively, model your instruction as reading and writing the full register with a normal two-addr constraint.</div><div><br></div><div>/jakob</div><div><br></div></div></body></html>