<html><head><base href="x-msg://262/"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><br><div><div>On Jul 7, 2011, at 12:08 PM, Villmow, Micah wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><span class="Apple-style-span" style="border-collapse: separate; font-family: Verdana; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-align: -webkit-auto; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-border-horizontal-spacing: 0px; -webkit-border-vertical-spacing: 0px; -webkit-text-decorations-in-effect: none; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px; font-size: medium; "><div lang="EN-US" link="blue" vlink="purple"><div class="WordSection1" style="page: WordSection1; "><div style="margin-top: 0in; margin-right: 0in; margin-left: 0in; margin-bottom: 0.0001pt; font-size: 11pt; font-family: Calibri, sans-serif; ">We are running into trouble with debug information in that we have registers along with sub registers, and they both point to the same dwarf register. Does LLVM support the DW_OP_piece/bit_piece debug information when allocating a sub-register from a super register? If not, is there any plan to add it? If not, would it be difficult to add?</div></div></div></span></blockquote><div><br></div>It would not be too difficult to add for your target. Today, ARM code gen supports this. See ARMAsmPrinter::EmitDwarfRegOp().</div><div><br></div><div>-</div><div>Devang</div><div><br></div></body></html>