<font color="#000000"><font face="verdana,sans-serif">Thank you for replying. Yes. The remaining part of the BB is in splitted basic block. <br></font></font><div><div><div><font class="Apple-style-span" face="verdana, sans-serif"><br>
</font></div><div><font class="Apple-style-span" face="verdana, sans-serif">The following is an example code generation for arm and x86 for a same IR BB. In the x86 code I can see that the same computation is done twice and result is stored in two different registers and then these two different registers are used for comparision. By the way I am duplicating instruction and inserting comparison to catch transient errors. <br>
</font></div><div><div class="gmail_quote"><br></div><div class="gmail_quote"><font class="Apple-style-span" color="#ff0000">IR BB:</font></div><div class="gmail_quote"><br></div><div class="gmail_quote"><div class="gmail_quote">
bb: ; preds = %bb1.split</div><div class="gmail_quote"> %0 = load i32* %i, align 4</div><div class="gmail_quote"> %HV10_ = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0</div>
<div class="gmail_quote"> %1 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0</div><div class="gmail_quote"> %HVCmp15 = icmp ne i32* %1, %HV10_</div><div class="gmail_quote"> br i1 %HVCmp15, label %relExit, label %bb.split</div>
<div><br></div><div><font class="Apple-style-span" color="#ff0000">x86 asm:</font></div><div> </div><div><div>.LBB0_1: # %bb</div><div> # in Loop: Header=BB0_5 Depth=1</div>
<div> leal 972(%esp), %eax</div><div> movl 568(%esp), %ecx</div><div> imull $4, %ecx, %edx</div><div> addl %eax, %edx</div><div> imull $4, %ecx, %ecx</div><div> addl %eax, %ecx</div><div> cmpl %edx, %ecx</div>
<div> movl %ecx, 508(%esp) # 4-byte Spill</div><div> jne .LBB0_88</div></div><div><br></div><div><font class="Apple-style-span" color="#ff0000">arm asm:</font></div><div> </div></div><div class="gmail_quote">
<div class="gmail_quote">
.LBB0_1: @ %bb</div><div class="gmail_quote"> @ in Loop: Header=BB0_5 Depth=1</div><div class="gmail_quote"> ldr r0, [sp, #444]</div><div class="gmail_quote">
add r1, sp, #53, 28 @ 848</div><div class="gmail_quote"> add r0, r1, r0, lsl #2</div><div class="gmail_quote"> cmp r0, r0</div><div class="gmail_quote"> str r0, [sp, #384]</div><div class="gmail_quote"> bne .LBB0_88</div>
<div class="gmail_quote"> b .LBB0_2</div><div><br></div><div>Thanks</div><div>Daya</div><div><br></div></div><div class="gmail_quote">On Wed, Jul 6, 2011 at 6:18 AM, Renato Golin <span dir="ltr"><<a href="mailto:renato.golin@arm.com">renato.golin@arm.com</a>></span> wrote:<br>
<blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex;"><div class="im">On 6 July 2011 02:31, D S Khudia <<a href="mailto:daya.khudia@gmail.com">daya.khudia@gmail.com</a>> wrote:<br>
> %0 = load i32* %i, align 4<br>
> %HV14_ = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0<br>
> %1 = getelementptr inbounds [100 x i32]* %a, i32 0, i32 %0<br>
> %HVCmp7 = icmp ne i32* %1, %HV14_<br>
> br i1 %HVCmp7, label %relExit, label %bb.split<br>
><br>
> So that HV14_ is a new instruction and I am inserting a comparison to jump<br>
> to a newly created basic block. Somehow the code generation for arm removes<br>
> the duplicated instruction and cmp instruction in arm assembly looks as<br>
> follows.<br>
> cmp r0, r0<br>
<br>
</div>Hi Daya,<br>
<br>
This is perfectly legal, since the two registers have exactly the same<br>
value (a[i]) and the comparison will always be the same.<br>
<br>
I suppose the rest of the original IR (the other array load, the<br>
stores and the increment) are in the branched basic blocks...<br>
<div class="im"><br>
<br>
> This defeats the purpose of doing the duplication in the first place. Does<br>
> anyone have any insight on this? Can anyone suggest some starting points to<br>
> debug this?<br>
<br>
</div>What is the purpose of the duplication?<br>
<br>
cheers,<br>
<font color="#888888">--renato<br>
</font></blockquote></div><br></div></div></div>