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</o:shapelayout></xml><![endif]--></head><body lang=EN-US link=blue vlink=purple><div class=WordSection1><p class=MsoNormal>I'm trying to debug a problem with our custom backend with using a tiered register allocation setup.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Just a little background. My target uses vec4 32bit registers and I want to have three levels of registers setup.<o:p></o:p></p><p class=MsoNormal>Each vec4 register can have two sub-regs of size vec2 32bit, and each sub-reg, has its own two sub-regs of 32bit each.<o:p></o:p></p><p class=MsoNormal>So it looks like this, xyzw -> {xy, zw} -> {x, y, z, w}.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Now the problem I am having is that for some reason, the linearscan allocator is running out of registers to allocate.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>This makes no sense to me as I have 1024 vec4 registers(so 2048 vec2 and 4096 scalars).<o:p></o:p></p><p class=MsoNormal>So I limited to a very small test case where I have 1 vec4(2 vec2 and 4 scalar) registers with <o:p></o:p></p><p class=MsoNormal>a function that requires 1 vec4 register and 5 scalar registers. So, basically what happens <o:p></o:p></p><p class=MsoNormal>is that everything works fine until the live-in register(which is scalar) to the function<o:p></o:p></p><p class=MsoNormal>conflicts with a register that is allocated for the vector(as it is a sub-sub-reg). The <o:p></o:p></p><p class=MsoNormal>linear scan allocator attempts to spill the live-in onto itself and then asserts with<o:p></o:p></p><p class=MsoNormal><span style='font-size:10.0pt;font-family:"Courier New"'>assert(<span style='color:blue'>false</span> && <span style='color:#A31515'>"Ran out of registers during register allocation!"</span>);.<o:p></o:p></span></p><p class=MsoNormal><span style='font-size:10.0pt;font-family:"Courier New"'><o:p> </o:p></span></p><p class=MsoNormal>I've attached the output of running LLC on my test case, which <o:p></o:p></p><p class=MsoNormal>I don't know if it will be helpful or not, to see what the live<o:p></o:p></p><p class=MsoNormal>interval and reg allocator are doing.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>I'm having trouble debugging this, any idea on where I might want to look?<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Another question is how do I influence the spill costs? I want to make live in's<o:p></o:p></p><p class=MsoNormal>infinitely expensive to spill, so any superreg or super-super-reg of the live in<o:p></o:p></p><p class=MsoNormal>never gets allocated.<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p><p class=MsoNormal>Thanks,<o:p></o:p></p><p class=MsoNormal>Micah<o:p></o:p></p><p class=MsoNormal><o:p> </o:p></p></div></body></html>