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Hi,<br>
<br>
llvm emits code for "memcpy" on ARM as consecutive ldr/str commands<span
class="Apple-style-span" style="border-collapse: separate; color:
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white-space: nowrap;"></span></span>, and further combines them
into ldm/stm with special pass after register allocation. But
ldm/stm commands require registers to go in ascending order, what is
often not so after regalloc, therefore some str/ldr commands. For
example such code:<br>
<br>
struct Foo {int a, b, c, d; }<br>
void CopyStruct(struct Foo *a, struct Foo *b) { *a = *b; }<br>
<br>
compiled to:<br>
<br>
ldmia r1, {r2, r3, r12}<br>
ldr r1, [r1, #12]<br>
stmia r0, {r2, r3, r12}<br>
str r1, [r0, #12]<br>
bx lr<br>
<br>
I ran different tests and always regalloc allocates at least one
register not in ascending order. <br>
<br>
What is your ideas to overcome this issue? Maybe llvm should emit
code for "memcpy" straight into ldm/stm or exchange registers before
combining ldr/str to make them go in ascending order or fix somehow
register allocator?<br>
<br>
Best regards, Vasiliy.<br>
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