Just a follow up to 2:<div><br></div><div>LLVM is allowed to expand the size of a register. Remember x86 machines cannot push or pop a 8 bit byte. The 8 bit byte would be expanded to 16 or 32 bits. </div><div><br></div><div>
- Jeff Kunkel<br><br><div class="gmail_quote">On Sat, Jan 29, 2011 at 12:36 PM, Jeff Kunkel <span dir="ltr"><<a href="mailto:jdkunk3@gmail.com">jdkunk3@gmail.com</a>></span> wrote:<br><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex;">
llvm::TargetRegisterClass::getSize()<div>llvm::TargetRegisterClass::getAllignment()</div><div>will return the size and alignment of a virtual register used both in register allocation and stack slot assignment. </div><div>
<br></div><div><br></div><div>llvm::TargetRegisterClass::alloc_order_begin()</div>llvm::TargetRegisterClass::alloc_order_end()<div>will give a list of the possible physical registers.</div><div><br></div><div>When a virtual register is assigned a physical register by v-reg map, that physical register should be in the target register class of the v-reg, and the aliases to that physical register can be found by </div>
<div>llvm::TargetRegisterInfo::getAliasSet( physical-register )</div><div><br></div><div>The main classes to look at for register information is</div><div>TargetRegisterClass</div><div>TargetRegisterInfo</div><div>MachineRegisterInfo</div>
<div><br></div><div>Thanks,<br>Jeff Kunkel</div><div><div><br><div class="gmail_quote"><div><div></div><div class="h5">On Fri, Jan 28, 2011 at 10:39 AM, John Criswell <span dir="ltr"><<a href="mailto:criswell@illinois.edu" target="_blank">criswell@illinois.edu</a>></span> wrote:<br>
</div></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex"><div><div></div><div class="h5">
<div bgcolor="#ffffff" text="#000000"><div>
On 1/28/11 8:14 AM, Qingan Li wrote:
<blockquote type="cite">Thanks for your help with me about the way to access
type and size of Value.
<div>But, I want also know the interface for me to access the
type or size of virtual registers in the SSA form. </div>
<div>1. I find no way to associate the virtual registers with the
Value class.</div>
</blockquote>
<br></div>
In the in-memory LLVM IR, all of the SSA values are C++ objects
derived from the Value class. For example, an Instruction object
(class Instruction derives from class Value) *is* the SSA value
generated by its result; they are one and the same.<div><br>
<br>
<blockquote type="cite">
<div>2. I also tried to get the size of register nReg by: </div>
<div> TargetRegisterClass::getSize(), where the
TargetRegisterClass object is obtained by
MachineRegisterInfo::getRegClass( nReg ). </div>
<div> But, I found it always returned with the value 4 bytes, say,
GR32 (My target is the x86-32 bits). If all virtual registers
were size of 32 bits, how could we consider the alias register
file during register allocation? Namely, if a temporary value
could be stored in 8 bits, why do we give it 32 bits? So, I
doubt my second way to get the size of virtual register was
wrong. Need your further help.</div>
</blockquote>
<br></div>
I don't work much with LLVM's code generator infrastructure (I
primarily do LLVM IR analysis and transforms), so I don't think I
can answer your question.<br>
<br>
When working with pure LLVM IR, we use the TargetData class
(<a href="http://llvm.org/doxygen/classllvm_1_1TargetData.html" target="_blank">http://llvm.org/doxygen/classllvm_1_1TargetData.html</a>) to determine
the size of various LLVM types. I'm not sure if it's what you want
to use in the code generator. Someone else will have to help you
with that.<br>
<br>
-- John T.<div><br>
<br>
<blockquote type="cite">
<div><br>
<div class="gmail_quote">2011/1/28 John Criswell <span dir="ltr"><<a href="mailto:criswell@illinois.edu" target="_blank">criswell@illinois.edu</a>></span><br>
<blockquote class="gmail_quote" style="margin:0pt 0pt 0pt 0.8ex;border-left:1px solid rgb(204, 204, 204);padding-left:1ex">
<div>On 1/27/11 3:23 AM, Qingan Li wrote:<br>
<blockquote class="gmail_quote" style="margin:0pt 0pt 0pt 0.8ex;border-left:1px solid rgb(204, 204, 204);padding-left:1ex">
Hi,<br>
<br>
I wonder if there is an interface for me to access the
type or size of virtual registers in the SSA form?<br>
I have scanned the MachineOperand in CodeGen part, and
failed to find this kind of info for virtual registers.<br>
</blockquote>
<br>
</div>
The getType() method of Value * will return the LLVM type.
The TargetData class will provide information on size for a
type on a particular hardware platform.<br>
<br>
-- John T.<br>
<br>
<blockquote class="gmail_quote" style="margin:0pt 0pt 0pt 0.8ex;border-left:1px solid rgb(204, 204, 204);padding-left:1ex">
<br>
-- <br>
Best regards,<br>
<br>
Li Qingan<br>
<br>
</blockquote>
<br>
</blockquote>
</div>
<br>
<br clear="all">
<br>
-- <br>
Best regards,
<div><br>
</div>
<div>Li Qingan</div>
<br>
</div>
</blockquote>
<br>
</div></div>
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