<html><head></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><br><div><div>On Jan 9, 2011, at 3:15 PM, Jakob Stoklund Olesen wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><span class="Apple-style-span" style="border-collapse: separate; font-family: Optima; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-border-horizontal-spacing: 0px; -webkit-border-vertical-spacing: 0px; -webkit-text-decorations-in-effect: none; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px; font-size: medium; "><span class="Apple-style-span" style="font-family: monospace; ">So I moved the virtual register range to 2^31 growing upwards.<br></span></span></blockquote></div><br><div>Note that this allows the index translation in an IndexedMap to be optimized away completely in 32-bit builds.</div><div><br></div><div><div>MachineRegisterInfo::setRegClass(unsigned Reg, const TargetRegisterClass *RC) {</div><div> const TargetRegisterClass *OldRC = VRegInfo[Reg].first;</div><div><br></div></div><div>Becomes:</div><div><br></div><div><span class="Apple-style-span" style="white-space: pre;">movl<span class="Apple-tab-span" style="white-space:pre"> </span>12(%ebp), %esi</span> <div>movl<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>8(%ebp), %eax</div><div>movl<span class="Apple-tab-span" style="white-space:pre"> </span>(%eax), %ecx</div><div>movl<span class="Apple-tab-span" style="white-space:pre"> </span><span class="Apple-tab-span" style="white-space:pre"> </span>(%ecx,%esi,8), %edx</div></div><div><br></div><div>The high bit on the virtual register number falls off in the address computation.</div><div><br></div></body></html>