<html><head></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><br><div><div>On Oct 8, 2010, at 5:21 AM, Jonas Paulsson wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><span class="Apple-style-span" style="border-collapse: separate; font-family: Helvetica; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-border-horizontal-spacing: 0px; -webkit-border-vertical-spacing: 0px; -webkit-text-decorations-in-effect: none; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px; font-size: medium; "><div class="hmmessage" style="font-size: 10pt; font-family: Tahoma; ">Hi,<br><br>I have worked with GCC prior to using LLVM, and I am a bit startled to find no way to use an earlier operand as is done in GCC.<br><br>For example, a sext instruction on my target takes one the operand of a low-part register, and then sign extends into the full register.I find that there is no way to use for example (set RC:$srsc, sext($src, 16)), or in any other way use a sext operator to perform this on one register.<br></div></span></blockquote><div><br></div>LLVM keeps the IR in SSA form until just before register allocation. You can't have an instruction like that in SSA because $src would have multiple definitions. Instead, you can add a constraint to the instruction definition, something like "$dst = $src", to indicate that both operands must be allocated to the same register. The TwoAddressInstructionPass will then make sure that happens.</div><div><br><blockquote type="cite"><span class="Apple-style-span" style="border-collapse: separate; font-family: Helvetica; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-border-horizontal-spacing: 0px; -webkit-border-vertical-spacing: 0px; -webkit-text-decorations-in-effect: none; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px; font-size: medium; "><div class="hmmessage" style="font-size: 10pt; font-family: Tahoma; ">It would be neat to be able to do this somehow. When I define a sext_inreg instruction, LLVM does not match the sext node in the DAG with this, unfortunately.<br></div></span></blockquote><div><br></div>This might be a different problem. I suspect you're confusing the sext and sext_inreg operations.</div><div><br></div><div>If the type that you are extending from, e.g., 16-bit integer, is not a legal type for your target, then before selection DAG matching all the 16-bit values will be legalized to some legal types, e.g., 32-bit integers. At that point a "sext" (e.g., 16 to 32 bits) may turn into a "sext_inreg" (e.g., source operand is already 32 bits but the high bits need to be set).</div><div><br></div><div>Those are just a few things to get you started on the right track. I hope it helps.</div><div><br><blockquote type="cite"><span class="Apple-style-span" style="border-collapse: separate; font-family: Helvetica; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-border-horizontal-spacing: 0px; -webkit-border-vertical-spacing: 0px; -webkit-text-decorations-in-effect: none; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px; font-size: medium; "><div class="hmmessage" style="font-size: 10pt; font-family: Tahoma; "><br>How is feats like this supposed to be done? Right now it seems that I need to do a custom lowering impelementation to replace the sext-SDValue with a subgraph with a 32bit virtual register, a copy to the low subregister, and then a sext_inreg node. Am I right?<br><br>I would appreciate any answer,<br><br>Jonas<br><br><br>_______________________________________________<br>LLVM Developers mailing list<br><a href="mailto:LLVMdev@cs.uiuc.edu">LLVMdev@cs.uiuc.edu</a><span class="Apple-converted-space"> </span> <a href="http://llvm.cs.uiuc.edu/">http://llvm.cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br></div></span></blockquote></div><br></body></html>