<html><head><base href="x-msg://246/"></head><body style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><br><div><div>On Mar 24, 2009, at 3:33 PM, <a href="mailto:Alireza.Moshtaghi@microchip.com">Alireza.Moshtaghi@microchip.com</a> wrote:</div><br class="Apple-interchange-newline"><blockquote type="cite"><span class="Apple-style-span" style="border-collapse: separate; color: rgb(0, 0, 0); font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-align: auto; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-border-horizontal-spacing: 0px; -webkit-border-vertical-spacing: 0px; -webkit-text-decorations-in-effect: none; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px; "><div lang="EN-US" link="blue" vlink="blue" style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><div class="Section1"><div style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="2" color="navy" face="Arial"><span style="font-size: 10pt; font-family: Arial; color: navy; ">Remember, our target does not have registers like ordinary processors do. So register allocation is really not going to do much for us. What we have to do is to exploit the existing opportunities in the source code and try to generate code based on such opportunities. The dag combination in question is one such opportunity that is being destroyed by the optimization.</span></font></div></div></div></span></blockquote><div><br></div>That's a very fragile system. Other optimization passes can easily create code that cause more than one value to be live at a time.</div><div><br><blockquote type="cite"><span class="Apple-style-span" style="border-collapse: separate; color: rgb(0, 0, 0); font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-align: auto; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-border-horizontal-spacing: 0px; -webkit-border-vertical-spacing: 0px; -webkit-text-decorations-in-effect: none; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px; "><div lang="EN-US" link="blue" vlink="blue" style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><div class="Section1"><div style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="2" color="navy" face="Arial"><span style="font-size: 10pt; font-family: Arial; color: navy; ">You maybe right in that this problem maybe addressed in register allocation but I’m not sure how. Could you shed some light on what you mean?</span></font></div><p class="MsoNormal" style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="2" color="navy" face="Arial"><span style="font-size: 10pt; font-family: Arial; color: navy; "></span></font></p></div></div></span></blockquote><div><br></div>I don't the existing register allocator is going to be a good fit. I don't know enough about your architecture. But it seems like an accumulator based machine? I would search for literature on register allocation for that type of architecture.</div><div><br></div><div>Evan</div><div><br><blockquote type="cite"><span class="Apple-style-span" style="border-collapse: separate; color: rgb(0, 0, 0); font-family: Helvetica; font-size: 12px; font-style: normal; font-variant: normal; font-weight: normal; letter-spacing: normal; line-height: normal; orphans: 2; text-align: auto; text-indent: 0px; text-transform: none; white-space: normal; widows: 2; word-spacing: 0px; -webkit-border-horizontal-spacing: 0px; -webkit-border-vertical-spacing: 0px; -webkit-text-decorations-in-effect: none; -webkit-text-size-adjust: auto; -webkit-text-stroke-width: 0px; "><div lang="EN-US" link="blue" vlink="blue" style="word-wrap: break-word; -webkit-nbsp-mode: space; -webkit-line-break: after-white-space; "><div class="Section1"><p class="MsoNormal" style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="2" color="navy" face="Arial"><span style="font-size: 10pt; font-family: Arial; color: navy; "> </span></font></p><div style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="2" color="navy" face="Arial"><span style="font-size: 10pt; font-family: Arial; color: navy; ">Thanks,</span></font></div><p class="MsoNormal" style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="2" color="navy" face="Arial"><span style="font-size: 10pt; font-family: Arial; color: navy; "> </span></font></p><div style="border-top-style: none; border-right-style: none; border-bottom-style: none; border-width: initial; border-color: initial; border-left-style: solid; border-left-color: blue; border-left-width: 1.5pt; padding-top: 0in; padding-right: 0in; padding-bottom: 0in; padding-left: 4pt; "><div><div class="MsoNormal" align="center" style="margin-top: 0in; margin-right: 0in; margin-bottom: 0.0001pt; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; text-align: center; "><font size="3" face="Times New Roman"><span style="font-size: 12pt; "><hr size="2" width="100%" align="center" tabindex="-1"></span></font></div><div style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><b><font size="2" face="Tahoma"><span style="font-size: 10pt; font-family: Tahoma; font-weight: bold; ">From:</span></font></b><font size="2" face="Tahoma"><span style="font-size: 10pt; font-family: Tahoma; "><span class="Apple-converted-space"> </span><a href="mailto:llvmdev-bounces@cs.uiuc.edu" style="color: blue; text-decoration: underline; ">llvmdev-bounces@cs.uiuc.edu</a><span class="Apple-converted-space"> </span>[mailto:llvmdev-bounces@cs.uiuc.edu]<span class="Apple-converted-space"> </span><b><span style="font-weight: bold; ">On Behalf Of<span class="Apple-converted-space"> </span></span></b>Evan Cheng<br><b><span style="font-weight: bold; ">Sent:</span></b><span class="Apple-converted-space"> </span>Monday, March 23, 2009 10:25 PM<br><b><span style="font-weight: bold; ">To:</span></b><span class="Apple-converted-space"> </span>LLVM Developers Mailing List<br><b><span style="font-weight: bold; ">Subject:</span></b><span class="Apple-converted-space"> </span>Re: [LLVMdev] Proposal to disable some of DAG combine optimizations</span></font></div></div><p class="MsoNormal" style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="3" face="Times New Roman"><span style="font-size: 12pt; "> </span></font></p><div style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="3" face="Times New Roman"><span style="font-size: 12pt; ">The code sequence:</span></font></div><div><blockquote type="cite" style="margin-top: 5pt; margin-bottom: 5pt; "><div><p style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; "><font size="2" face="Times New Roman"><span style="font-size: 10pt; ">store %tmp1, var<br>> tmp4 = add %tmp3 , %tmp1</span></font></p></div></blockquote><div><p class="MsoNormal" style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="3" face="Times New Roman"><span style="font-size: 12pt; "> </span></font></p></div><div><div style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="3" face="Times New Roman"><span style="font-size: 12pt; ">can happen even if you eliminate the specific dag combine in question. The real solution lies elsewhere. To me, this seems more like a register allocation problem.</span></font></div></div><div><p class="MsoNormal" style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="3" face="Times New Roman"><span style="font-size: 12pt; "> </span></font></p></div><div><div style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="3" face="Times New Roman"><span style="font-size: 12pt; ">Evan</span></font></div></div><div><p class="MsoNormal" style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="3" face="Times New Roman"><span style="font-size: 12pt; "> </span></font></p></div><div><div><div><div style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="3" face="Times New Roman"><span style="font-size: 12pt; ">On Mar 22, 2009, at 9:39 PM,<span class="Apple-converted-space"> </span><a href="mailto:Alireza.Moshtaghi@microchip.com" style="color: blue; text-decoration: underline; ">Alireza.Moshtaghi@microchip.com</a><span class="Apple-converted-space"> </span>wrote:</span></font></div></div><div style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="3" face="Times New Roman"><span style="font-size: 12pt; "><br><br></span></font></div><div><p style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-bottom: 12pt; "><font size="2" face="Times New Roman"><span style="font-size: 10pt; ">I can't think of any workaround? this optimization eliminates so much information that if we want to retrieve back, it will take a lot of processing and may not necessarily be able to retrieve the lost information for all cases.<br>Besides, why does the generic part of llvm have to force an optimization that is counter productive to some targets?<br>If there are other phases that do the same optimization, I think we should also be able to disable them in those phases as well.<br><br>A.<br><br><br>-----Original Message-----<br>From:<span class="Apple-converted-space"> </span><a href="mailto:llvmdev-bounces@cs.uiuc.edu" style="color: blue; text-decoration: underline; ">llvmdev-bounces@cs.uiuc.edu</a><span class="Apple-converted-space"> </span>on behalf of Dan Gohman<br>Sent: Thu 3/19/2009 5:39 PM<br>To: LLVM Developers Mailing List<br>Subject: Re: [LLVMdev] Proposal to disable some of DAG combine optimizations<br><br>Disabling this optimization in the DAG combiner isn't going to<br>eliminate the problem; instcombine, GVN, and maybe even others also<br>happen to perform this optimization. You may find it more effective<br>to look for ways for codegen to recover in these kinds of situations.<br><br>Dan<br><br>On Mar 19, 2009, at 10:38 AM,<span class="Apple-converted-space"> </span><a href="mailto:Alireza.Moshtaghi@microchip.com" style="color: blue; text-decoration: underline; ">Alireza.Moshtaghi@microchip.com</a><span class="Apple-converted-space"> </span>wrote:<br><br>> Some of the optimizations that the first DAG combine performs is <br>> counter<br>> productive for our 8-bit target. For example in:<br>><br>> // I dropped the types because they are irrelevant.<br>> // Excuse me for changing the syntax...<br>> store %tmp1, %var<br>> %tmp2 = load %var<br>> %tmp4 = add %tmp3, %tmp2<br>><br>> Since load is the only user of var and since var has just be stored <br>> to,<br>> it assumes that %tmp1 is alive and it goes ahead and removes the load<br>> and does:<br>><br>> store %tmp1, var<br>> tmp4 = add %tmp3 , %tmp1<br>><br>> This is great for architectures that have more than one registers<br>> because it is likely that value of %tmp1 is already in a physical<br>> register, hence saving an instruction. However for our 8-bit<br>> architecture with only one register, this kind of assumptions will <br>> just<br>> result in extra overhead because "add" operates only on memory, so we<br>> have to generate more instructions to store tmp1 to memory and then <br>> use<br>> that memory location for "add". But without the optimizations, we <br>> could<br>> just use var and everything would work out just fine.<br>><br>> So I propose to add a bit mask and a method to TargetLowering class so<br>> targets can individually select some of the optimizations to be turned<br>> off.<br>><br>> Thoughts?<br>><br>> Alireza Moshtaghi<br>> Senior Software Engineer<br>> Development Systems, Microchip Technology<br>><br>> _______________________________________________<br>> LLVM Developers mailing list<br>><span class="Apple-converted-space"> </span><a href="mailto:LLVMdev@cs.uiuc.edu" style="color: blue; text-decoration: underline; ">LLVMdev@cs.uiuc.edu</a> <span class="Apple-converted-space"> </span><a href="http://llvm.cs.uiuc.edu/" style="color: blue; text-decoration: underline; ">http://llvm.cs.uiuc.edu</a><br>><span class="Apple-converted-space"> </span><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" style="color: blue; text-decoration: underline; ">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br><br>_______________________________________________<br>LLVM Developers mailing list<br><a href="mailto:LLVMdev@cs.uiuc.edu" style="color: blue; text-decoration: underline; ">LLVMdev@cs.uiuc.edu</a> <span class="Apple-converted-space"> </span><a href="http://llvm.cs.uiuc.edu/" style="color: blue; text-decoration: underline; ">http://llvm.cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" style="color: blue; text-decoration: underline; ">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a></span></font></p></div><div style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="3" face="Times New Roman"><span style="font-size: 12pt; ">_______________________________________________<br>LLVM Developers mailing list<br><a href="mailto:LLVMdev@cs.uiuc.edu" style="color: blue; text-decoration: underline; ">LLVMdev@cs.uiuc.edu</a><span class="Apple-converted-space"> </span> <a href="http://llvm.cs.uiuc.edu" style="color: blue; text-decoration: underline; ">http://llvm.cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" style="color: blue; text-decoration: underline; ">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a></span></font></div></div><p class="MsoNormal" style="margin-right: 0in; margin-left: 0in; font-size: 12pt; font-family: 'Times New Roman'; margin-top: 0in; margin-bottom: 0.0001pt; "><font size="3" face="Times New Roman"><span style="font-size: 12pt; "> </span></font></p></div></div></div></div>_______________________________________________<br>LLVM Developers mailing list<br><a href="mailto:LLVMdev@cs.uiuc.edu" style="color: blue; text-decoration: underline; ">LLVMdev@cs.uiuc.edu</a><span class="Apple-converted-space"> </span> <a href="http://llvm.cs.uiuc.edu" style="color: blue; text-decoration: underline; ">http://llvm.cs.uiuc.edu</a><br><a href="http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev" style="color: blue; text-decoration: underline; ">http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev</a><br></div></span></blockquote></div><br></body></html>