Index: include/llvm/Target/TargetLowering.h
===================================================================
--- include/llvm/Target/TargetLowering.h	(revision 41731)
+++ include/llvm/Target/TargetLowering.h	(working copy)
@@ -25,6 +25,7 @@
 #include "llvm/CodeGen/SelectionDAGNodes.h"
 #include "llvm/CodeGen/RuntimeLibcalls.h"
 #include "llvm/ADT/APFloat.h"
+#include "llvm/ADT/STLExtras.h"
 #include <map>
 #include <vector>
 
@@ -154,8 +155,7 @@
     }
     void setTypeAction(MVT::ValueType VT, LegalizeAction Action) {
       assert(!MVT::isExtendedVT(VT));
-      assert(unsigned(VT >> 4) < 
-             sizeof(ValueTypeActions)/sizeof(ValueTypeActions[0]));
+      assert(unsigned(VT >> 4) < array_lengthof(ValueTypeActions));
       ValueTypeActions[VT>>4] |= Action << ((VT*2) & 31);
     }
   };
@@ -711,7 +711,7 @@
   /// with the specified type and indicate what to do about it.
   void setOperationAction(unsigned Op, MVT::ValueType VT,
                           LegalizeAction Action) {
-    assert(VT < 32 && Op < sizeof(OpActions)/sizeof(OpActions[0]) &&
+    assert(VT < 32 && Op < array_lengthof(OpActions) &&
            "Table isn't big enough!");
     OpActions[Op] &= ~(uint64_t(3UL) << VT*2);
     OpActions[Op] |= (uint64_t)Action << VT*2;
@@ -721,7 +721,7 @@
   /// work with the with specified type and indicate what to do about it.
   void setLoadXAction(unsigned ExtType, MVT::ValueType VT,
                       LegalizeAction Action) {
-    assert(VT < 32 && ExtType < sizeof(LoadXActions)/sizeof(LoadXActions[0]) &&
+    assert(VT < 32 && ExtType < array_lengthof(LoadXActions) &&
            "Table isn't big enough!");
     LoadXActions[ExtType] &= ~(uint64_t(3UL) << VT*2);
     LoadXActions[ExtType] |= (uint64_t)Action << VT*2;
@@ -742,7 +742,7 @@
   void setIndexedLoadAction(unsigned IdxMode, MVT::ValueType VT,
                             LegalizeAction Action) {
     assert(VT < 32 && IdxMode <
-           sizeof(IndexedModeActions[0]) / sizeof(IndexedModeActions[0][0]) &&
+           array_lengthof(IndexedModeActions[0]) &&
            "Table isn't big enough!");
     IndexedModeActions[0][IdxMode] &= ~(uint64_t(3UL) << VT*2);
     IndexedModeActions[0][IdxMode] |= (uint64_t)Action << VT*2;
@@ -755,7 +755,7 @@
   void setIndexedStoreAction(unsigned IdxMode, MVT::ValueType VT,
                              LegalizeAction Action) {
     assert(VT < 32 && IdxMode <
-           sizeof(IndexedModeActions[1]) / sizeof(IndexedModeActions[1][0]) &&
+           array_lengthof(IndexedModeActions[1]) &&
            "Table isn't big enough!");
     IndexedModeActions[1][IdxMode] &= ~(uint64_t(3UL) << VT*2);
     IndexedModeActions[1][IdxMode] |= (uint64_t)Action << VT*2;
Index: include/llvm/ADT/STLExtras.h
===================================================================
--- include/llvm/ADT/STLExtras.h	(revision 41731)
+++ include/llvm/ADT/STLExtras.h	(working copy)
@@ -19,6 +19,7 @@
 
 #include <functional>
 #include <utility> // for std::pair
+#include <cstring> // for std::size_t
 #include "llvm/ADT/iterator"
 
 namespace llvm {
@@ -199,6 +200,24 @@
   return tier<T1, T2>(f, s);
 }
 
+//===----------------------------------------------------------------------===//
+//     Extra additions to arrays
+//===----------------------------------------------------------------------===//
+
+/// Find where an array ends (for ending iterators)
+/// This returns a pointer to the byte immediately
+/// after the end of an array.
+template<class T, std::size_t N>
+inline T *array_endof(T (&x)[N]) {
+  return x+N;
+}
+
+/// Find the length of an array.
+template<class T, std::size_t N>
+inline size_t array_lengthof(T (&x)[N]) {
+  return N;
+}
+
 } // End llvm namespace
 
 #endif
Index: lib/Analysis/BasicAliasAnalysis.cpp
===================================================================
--- lib/Analysis/BasicAliasAnalysis.cpp	(revision 41731)
+++ lib/Analysis/BasicAliasAnalysis.cpp	(working copy)
@@ -27,6 +27,7 @@
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/ADT/BitVector.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Support/GetElementPtrTypeIterator.h"
 #include "llvm/Support/ManagedStatic.h"
@@ -890,13 +891,11 @@
   if (!Initialized) {
     NoMemoryTable->insert(NoMemoryTable->end(),
                           DoesntAccessMemoryFns, 
-                          DoesntAccessMemoryFns+
-                sizeof(DoesntAccessMemoryFns)/sizeof(DoesntAccessMemoryFns[0]));
+                          array_endof(DoesntAccessMemoryFns));
 
     OnlyReadsMemoryTable->insert(OnlyReadsMemoryTable->end(),
-                                OnlyReadsMemoryFns, 
-                                OnlyReadsMemoryFns+
-                      sizeof(OnlyReadsMemoryFns)/sizeof(OnlyReadsMemoryFns[0]));
+                                 OnlyReadsMemoryFns, 
+                                 array_endof(OnlyReadsMemoryFns));
 
     // Sort the table the first time through.
     std::sort(NoMemoryTable->begin(), NoMemoryTable->end(), StringCompare());
Index: lib/CodeGen/IntrinsicLowering.cpp
===================================================================
--- lib/CodeGen/IntrinsicLowering.cpp	(revision 41731)
+++ lib/CodeGen/IntrinsicLowering.cpp	(working copy)
@@ -20,6 +20,7 @@
 #include "llvm/Support/Streams.h"
 #include "llvm/Target/TargetData.h"
 #include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/STLExtras.h"
 using namespace llvm;
 
 template <class ArgIt>
@@ -421,7 +422,7 @@
     CI->getOperand(2),
     CI->getOperand(3)
   };
-  return new CallInst(F, Args, Args+sizeof(Args)/sizeof(Args[0]), CI->getName(), CI);
+  return new CallInst(F, Args, array_endof(Args), CI->getName(), CI);
 }
 
 /// Convert the llvm.part.set.iX.iY.iZ intrinsic. This intrinsic takes 
@@ -587,7 +588,7 @@
     CI->getOperand(3),
     CI->getOperand(4)
   };
-  return new CallInst(F, Args, Args+sizeof(Args)/sizeof(Args[0]), CI->getName(), CI);
+  return new CallInst(F, Args, array_endof(Args), CI->getName(), CI);
 }
 
 
Index: lib/CodeGen/SelectionDAG/TargetLowering.cpp
===================================================================
--- lib/CodeGen/SelectionDAG/TargetLowering.cpp	(revision 41731)
+++ lib/CodeGen/SelectionDAG/TargetLowering.cpp	(working copy)
@@ -18,6 +18,7 @@
 #include "llvm/DerivedTypes.h"
 #include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/ADT/StringExtras.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/Support/MathExtras.h"
 using namespace llvm;
 
@@ -145,8 +146,7 @@
   ShiftAmountTy = SetCCResultTy = PointerTy = getValueType(TD->getIntPtrType());
   ShiftAmtHandling = Undefined;
   memset(RegClassForVT, 0,MVT::LAST_VALUETYPE*sizeof(TargetRegisterClass*));
-  memset(TargetDAGCombineArray, 0, 
-         sizeof(TargetDAGCombineArray)/sizeof(TargetDAGCombineArray[0]));
+  memset(TargetDAGCombineArray, 0, array_lengthof(TargetDAGCombineArray));
   maxStoresPerMemset = maxStoresPerMemcpy = maxStoresPerMemmove = 8;
   allowUnalignedMemoryAccesses = false;
   UseUnderscoreSetJmp = false;
Index: lib/System/Unix/Signals.inc
===================================================================
--- lib/System/Unix/Signals.inc	(revision 41731)
+++ lib/System/Unix/Signals.inc	(working copy)
@@ -13,6 +13,7 @@
 //===----------------------------------------------------------------------===//
 
 #include "Unix.h"
+#include "llvm/ADT/STLExtras.h"
 #include <vector>
 #include <algorithm>
 #if HAVE_EXECINFO_H
@@ -40,7 +41,7 @@
 const int IntSigs[] = {
   SIGHUP, SIGINT, SIGQUIT, SIGPIPE, SIGTERM, SIGUSR1, SIGUSR2
 };
-const int *IntSigsEnd = IntSigs + sizeof(IntSigs)/sizeof(IntSigs[0]);
+const int *IntSigsEnd = array_endof(IntSigs);
 
 // KillSigs - Signals that are synchronous with the program that will cause it
 // to die.
@@ -50,7 +51,7 @@
   , SIGEMT
 #endif
 };
-const int *KillSigsEnd = KillSigs + sizeof(KillSigs)/sizeof(KillSigs[0]);
+const int *KillSigsEnd = array_endof(KillSigs);
 
 #ifdef HAVE_BACKTRACE
 void* StackTrace[256];
@@ -68,7 +69,7 @@
 void PrintStackTrace() {
 #ifdef HAVE_BACKTRACE
   // Use backtrace() to output a backtrace on Linux systems with glibc.
-  int depth = backtrace(StackTrace, sizeof(StackTrace)/sizeof(StackTrace[0]));
+  int depth = backtrace(StackTrace, array_lengthof(StackTrace));
   
   // Create a one-way unix pipe.  The backtracing process writes to PipeFDs[1],
   // the c++filt process reads from PipeFDs[0].
Index: lib/Target/PowerPC/PPCISelLowering.cpp
===================================================================
--- lib/Target/PowerPC/PPCISelLowering.cpp	(revision 41731)
+++ lib/Target/PowerPC/PPCISelLowering.cpp	(working copy)
@@ -16,6 +16,7 @@
 #include "PPCPredicates.h"
 #include "PPCTargetMachine.h"
 #include "PPCPerfectShuffle.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/VectorExtras.h"
 #include "llvm/Analysis/ScalarEvolutionExpressions.h"
 #include "llvm/CodeGen/CallingConvLower.h"
@@ -1264,9 +1265,9 @@
     PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
   };
 
-  const unsigned Num_GPR_Regs = sizeof(GPR_32)/sizeof(GPR_32[0]);
+  const unsigned Num_GPR_Regs = array_lengthof(GPR_32);
   const unsigned Num_FPR_Regs = isMachoABI ? 13 : 8;
-  const unsigned Num_VR_Regs  = sizeof( VR)/sizeof( VR[0]);
+  const unsigned Num_VR_Regs  = array_lengthof( VR);
 
   unsigned GPR_idx = 0, FPR_idx = 0, VR_idx = 0;
   
@@ -1583,9 +1584,9 @@
     PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8,
     PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13
   };
-  const unsigned NumGPRs = sizeof(GPR_32)/sizeof(GPR_32[0]);
+  const unsigned NumGPRs = array_lengthof(GPR_32);
   const unsigned NumFPRs = isMachoABI ? 13 : 8;
-  const unsigned NumVRs  = sizeof( VR)/sizeof( VR[0]);
+  const unsigned NumVRs  = array_lengthof( VR);
   
   const unsigned *GPR = isPPC64 ? GPR_64 : GPR_32;
 
@@ -2399,7 +2400,7 @@
       -8, 8, -9, 9, -10, 10, -11, 11, -12, 12, -13, 13, 14, -14, 15, -15, -16
     };
     
-    for (unsigned idx = 0; idx < sizeof(SplatCsts)/sizeof(SplatCsts[0]); ++idx){
+    for (unsigned idx = 0; idx < array_lengthof(SplatCsts); ++idx) {
       // Indirect through the SplatCsts array so that we favor 'vsplti -1' for
       // cases which are ambiguous (e.g. formation of 0x8000_0000).  'vsplti -1'
       int i = SplatCsts[idx];
Index: lib/Target/PowerPC/PPCInstrInfo.cpp
===================================================================
--- lib/Target/PowerPC/PPCInstrInfo.cpp	(revision 41731)
+++ lib/Target/PowerPC/PPCInstrInfo.cpp	(working copy)
@@ -15,11 +15,12 @@
 #include "PPCPredicates.h"
 #include "PPCGenInstrInfo.inc"
 #include "PPCTargetMachine.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 using namespace llvm;
 
 PPCInstrInfo::PPCInstrInfo(PPCTargetMachine &tm)
-  : TargetInstrInfo(PPCInsts, sizeof(PPCInsts)/sizeof(PPCInsts[0])), TM(tm),
+  : TargetInstrInfo(PPCInsts, array_lengthof(PPCInsts)), TM(tm),
     RI(*TM.getSubtargetImpl(), *this) {}
 
 /// getPointerRegClass - Return the register class to use to hold pointers.
Index: lib/Target/ARM/ARMInstrInfo.cpp
===================================================================
--- lib/Target/ARM/ARMInstrInfo.cpp	(revision 41731)
+++ lib/Target/ARM/ARMInstrInfo.cpp	(working copy)
@@ -17,6 +17,7 @@
 #include "ARMAddressingModes.h"
 #include "ARMGenInstrInfo.inc"
 #include "ARMMachineFunctionInfo.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/CodeGen/LiveVariables.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineJumpTableInfo.h"
@@ -28,7 +29,7 @@
                                   cl::desc("Enable ARM 2-addr to 3-addr conv"));
 
 ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI)
-  : TargetInstrInfo(ARMInsts, sizeof(ARMInsts)/sizeof(ARMInsts[0])),
+  : TargetInstrInfo(ARMInsts, array_lengthof(ARMInsts)),
     RI(*this, STI) {
 }
 
Index: lib/Target/Alpha/AlphaInstrInfo.cpp
===================================================================
--- lib/Target/Alpha/AlphaInstrInfo.cpp	(revision 41731)
+++ lib/Target/Alpha/AlphaInstrInfo.cpp	(working copy)
@@ -14,11 +14,12 @@
 #include "Alpha.h"
 #include "AlphaInstrInfo.h"
 #include "AlphaGenInstrInfo.inc"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 using namespace llvm;
 
 AlphaInstrInfo::AlphaInstrInfo()
-  : TargetInstrInfo(AlphaInsts, sizeof(AlphaInsts)/sizeof(AlphaInsts[0])),
+  : TargetInstrInfo(AlphaInsts, array_lengthof(AlphaInsts)),
     RI(*this) { }
 
 
Index: lib/Target/X86/X86RegisterInfo.cpp
===================================================================
--- lib/Target/X86/X86RegisterInfo.cpp	(revision 41731)
+++ lib/Target/X86/X86RegisterInfo.cpp	(working copy)
@@ -392,16 +392,13 @@
   return NULL;
 }
 
-#define ARRAY_SIZE(TABLE)  \
-   (sizeof(TABLE)/sizeof(TABLE[0]))
-
 #ifdef NDEBUG
 #define ASSERT_SORTED(TABLE)
 #else
 #define ASSERT_SORTED(TABLE)                                              \
   { static bool TABLE##Checked = false;                                   \
     if (!TABLE##Checked) {                                                \
-       assert(TableIsSorted(TABLE, ARRAY_SIZE(TABLE)) &&                  \
+       assert(TableIsSorted(TABLE, array_lengthof(TABLE)) &&              \
               "All lookup tables must be sorted for efficient access!");  \
        TABLE##Checked = true;                                             \
     }                                                                     \
@@ -590,7 +587,7 @@
     };
     ASSERT_SORTED(OpcodeTable);
     OpcodeTablePtr = OpcodeTable;
-    OpcodeTableSize = ARRAY_SIZE(OpcodeTable);
+    OpcodeTableSize = array_lengthof(OpcodeTable);
     isTwoAddrFold = true;
   } else if (i == 0) { // If operand 0
     if (MI->getOpcode() == X86::MOV16r0)
@@ -675,7 +672,7 @@
 
     ASSERT_SORTED(OpcodeTable);
     OpcodeTablePtr = OpcodeTable;
-    OpcodeTableSize = ARRAY_SIZE(OpcodeTable);
+    OpcodeTableSize = array_lengthof(OpcodeTable);
   } else if (i == 1) {
     static const TableEntry OpcodeTable[] = {
       { X86::CMP16rr,         X86::CMP16rm },
@@ -784,7 +781,7 @@
 
     ASSERT_SORTED(OpcodeTable);
     OpcodeTablePtr = OpcodeTable;
-    OpcodeTableSize = ARRAY_SIZE(OpcodeTable);
+    OpcodeTableSize = array_lengthof(OpcodeTable);
   } else if (i == 2) {
     static const TableEntry OpcodeTable[] = {
       { X86::ADC32rr,         X86::ADC32rm },
@@ -979,7 +976,7 @@
 
     ASSERT_SORTED(OpcodeTable);
     OpcodeTablePtr = OpcodeTable;
-    OpcodeTableSize = ARRAY_SIZE(OpcodeTable);
+    OpcodeTableSize = array_lengthof(OpcodeTable);
   }
   
   // If table selected...
Index: lib/Target/X86/X86InstrInfo.cpp
===================================================================
--- lib/Target/X86/X86InstrInfo.cpp	(revision 41731)
+++ lib/Target/X86/X86InstrInfo.cpp	(working copy)
@@ -17,13 +17,14 @@
 #include "X86InstrBuilder.h"
 #include "X86Subtarget.h"
 #include "X86TargetMachine.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/LiveVariables.h"
 #include "llvm/CodeGen/SSARegMap.h"
 using namespace llvm;
 
 X86InstrInfo::X86InstrInfo(X86TargetMachine &tm)
-  : TargetInstrInfo(X86Insts, sizeof(X86Insts)/sizeof(X86Insts[0])),
+  : TargetInstrInfo(X86Insts, array_lengthof(X86Insts)),
     TM(tm), RI(tm, *this) {
 }
 
Index: lib/Target/X86/X86FloatingPoint.cpp
===================================================================
--- lib/Target/X86/X86FloatingPoint.cpp	(revision 41731)
+++ lib/Target/X86/X86FloatingPoint.cpp	(working copy)
@@ -299,16 +299,13 @@
   return -1;
 }
 
-#define ARRAY_SIZE(TABLE)  \
-   (sizeof(TABLE)/sizeof(TABLE[0]))
-
 #ifdef NDEBUG
 #define ASSERT_SORTED(TABLE)
 #else
 #define ASSERT_SORTED(TABLE)                                              \
   { static bool TABLE##Checked = false;                                   \
     if (!TABLE##Checked) {                                                \
-       assert(TableIsSorted(TABLE, ARRAY_SIZE(TABLE)) &&                  \
+       assert(TableIsSorted(TABLE, array_lengthof(TABLE)) &&              \
               "All lookup tables must be sorted for efficient access!");  \
        TABLE##Checked = true;                                             \
     }                                                                     \
@@ -487,7 +484,7 @@
 
 static unsigned getConcreteOpcode(unsigned Opcode) {
   ASSERT_SORTED(OpcodeTable);
-  int Opc = Lookup(OpcodeTable, ARRAY_SIZE(OpcodeTable), Opcode);
+  int Opc = Lookup(OpcodeTable, array_lengthof(OpcodeTable), Opcode);
   assert(Opc != -1 && "FP Stack instruction not in OpcodeTable!");
   return Opc;
 }
@@ -535,7 +532,7 @@
   RegMap[Stack[--StackTop]] = ~0;     // Update state
 
   // Check to see if there is a popping version of this instruction...
-  int Opcode = Lookup(PopTable, ARRAY_SIZE(PopTable), I->getOpcode());
+  int Opcode = Lookup(PopTable, array_lengthof(PopTable), I->getOpcode());
   if (Opcode != -1) {
     I->setInstrDescriptor(TII->get(Opcode));
     if (Opcode == X86::UCOM_FPPr)
@@ -830,7 +827,8 @@
       InstTable = ReverseSTiTable;
   }
 
-  int Opcode = Lookup(InstTable, ARRAY_SIZE(ForwardST0Table), MI->getOpcode());
+  int Opcode = Lookup(InstTable, array_lengthof(ForwardST0Table),
+                      MI->getOpcode());
   assert(Opcode != -1 && "Unknown TwoArgFP pseudo instruction!");
 
   // NotTOS - The register which is not on the top of stack...
Index: lib/Target/IA64/IA64InstrInfo.cpp
===================================================================
--- lib/Target/IA64/IA64InstrInfo.cpp	(revision 41731)
+++ lib/Target/IA64/IA64InstrInfo.cpp	(working copy)
@@ -14,12 +14,13 @@
 #include "IA64InstrInfo.h"
 #include "IA64.h"
 #include "IA64InstrBuilder.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "IA64GenInstrInfo.inc"
 using namespace llvm;
 
 IA64InstrInfo::IA64InstrInfo()
-  : TargetInstrInfo(IA64Insts, sizeof(IA64Insts)/sizeof(IA64Insts[0])),
+  : TargetInstrInfo(IA64Insts, array_lengthof(IA64Insts)),
     RI(*this) {
 }
 
Index: lib/Target/Mips/MipsInstrInfo.cpp
===================================================================
--- lib/Target/Mips/MipsInstrInfo.cpp	(revision 41731)
+++ lib/Target/Mips/MipsInstrInfo.cpp	(working copy)
@@ -13,6 +13,7 @@
 
 #include "Mips.h"
 #include "MipsInstrInfo.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "MipsGenInstrInfo.inc"
 
@@ -20,7 +21,7 @@
 
 // TODO: Add the subtarget support on this constructor
 MipsInstrInfo::MipsInstrInfo(MipsTargetMachine &tm)
-  : TargetInstrInfo(MipsInsts, sizeof(MipsInsts)/sizeof(MipsInsts[0])),
+  : TargetInstrInfo(MipsInsts, array_lengthof(MipsInsts)),
     TM(tm), RI(*this) {}
 
 static bool isZeroImm(const MachineOperand &op) {
Index: lib/Target/Sparc/SparcInstrInfo.cpp
===================================================================
--- lib/Target/Sparc/SparcInstrInfo.cpp	(revision 41731)
+++ lib/Target/Sparc/SparcInstrInfo.cpp	(working copy)
@@ -13,12 +13,13 @@
 
 #include "SparcInstrInfo.h"
 #include "Sparc.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "SparcGenInstrInfo.inc"
 using namespace llvm;
 
 SparcInstrInfo::SparcInstrInfo(SparcSubtarget &ST)
-  : TargetInstrInfo(SparcInsts, sizeof(SparcInsts)/sizeof(SparcInsts[0])),
+  : TargetInstrInfo(SparcInsts, array_lengthof(SparcInsts)),
     RI(ST, *this) {
 }
 
Index: lib/VMCore/Mangler.cpp
===================================================================
--- lib/VMCore/Mangler.cpp	(revision 41731)
+++ lib/VMCore/Mangler.cpp	(working copy)
@@ -14,6 +14,7 @@
 #include "llvm/Support/Mangler.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/Module.h"
+#include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/StringExtras.h"
 using namespace llvm;
 
@@ -185,9 +186,7 @@
 Mangler::Mangler(Module &M, const char *prefix)
   : Prefix(prefix), UseQuotes(false), PreserveAsmNames(false),
     Count(0), TypeCounter(0) {
-  std::fill(AcceptableChars, 
-          AcceptableChars+sizeof(AcceptableChars)/sizeof(AcceptableChars[0]),
-            0);
+  std::fill(AcceptableChars, array_endof(AcceptableChars), 0);
 
   // Letters and numbers are acceptable.
   for (unsigned char X = 'a'; X <= 'z'; ++X)
