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<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'>Spent some time today getting to know the X86Subtarget
code better and played around and artificially lowered the processor abilities
to ensure things would still go nice and smoothly. They do, so please ignore
this question. </span></font><font size=2 color=navy face=Wingdings><span
style='font-size:10.0pt;font-family:Wingdings;color:navy'>J</span></font><font
size=2 color=navy face=Arial><span style='font-size:10.0pt;font-family:Arial;
color:navy'><o:p></o:p></span></font></p>
<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'><o:p> </o:p></span></font></p>
<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'>Thanks,<o:p></o:p></span></font></p>
<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'>Chuck. <o:p></o:p></span></font></p>
<p class=MsoNormal><font size=2 color=navy face=Arial><span style='font-size:
10.0pt;font-family:Arial;color:navy'><o:p> </o:p></span></font></p>
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<p class=MsoNormal><b><font size=2 face=Tahoma><span style='font-size:10.0pt;
font-family:Tahoma;font-weight:bold'>From:</span></font></b><font size=2
face=Tahoma><span style='font-size:10.0pt;font-family:Tahoma'>
llvmdev-bounces@cs.uiuc.edu [mailto:llvmdev-bounces@cs.uiuc.edu] <b><span
style='font-weight:bold'>On Behalf Of </span></b>Chuck Rose III<br>
<b><span style='font-weight:bold'>Sent:</span></b> Monday, July 30, 2007 2:47
PM<br>
<b><span style='font-weight:bold'>To:</span></b> <st1:PersonName w:st="on">LLVM
Developers Mailing List</st1:PersonName><br>
<b><span style='font-weight:bold'>Subject:</span></b> [LLVMdev] SSE levels
& x86 code-gen</span></font><o:p></o:p></p>
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<p class=MsoNormal><font size=3 face="Times New Roman"><span style='font-size:
12.0pt'><o:p> </o:p></span></font></p>
<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'>Hola LLVMers,<o:p></o:p></span></font></p>
<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'><o:p> </o:p></span></font></p>
<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'>Our language has many vectors in it and I’m looking to
make better use of the SSE instructions on my chips. Based on the
experiments I did last week and the help you gave me regarding generating the
right IR to generate sound SSE code, I’m ready to begin a major overhaul
of our system. I have a big question remaining: if I’m
running on an x86 system which is, say SSE-1 only, and we’re working with
some double vectors, what happens when we do a compile? Does the compiler
know to scalarize those vectors and use different instructions? <o:p></o:p></span></font></p>
<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'><o:p> </o:p></span></font></p>
<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'>Thanks,<o:p></o:p></span></font></p>
<p class=MsoNormal><font size=2 face=Arial><span style='font-size:10.0pt;
font-family:Arial'>Chuck. <o:p></o:p></span></font></p>
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