[llvm-dev] RISC-V LLVM sync-up call 7th May 2020
Alex Bradbury via llvm-dev
llvm-dev at lists.llvm.org
Thu May 7 04:10:01 PDT 2020
For background on these calls, see
Reminder: the purpose is to co-ordinate between active contributors.
If you have support questions etc then it's best to post to llvm-dev.
We have a call each Thursday at 4pm BST, via
I've created a shared calendar which may help in keeping track, which
is accessible at:
I'm actually out-of-office today and won't be available to dial-in,
but my colleagues Sam Elliot and Luis Marques will host today's
Issues to discuss today include the following:
* RVV intrinsics
* SiFive interrupt attributes and CLIC CSRs <https://reviews.llvm.org/D79521>,
* Latest updates from differential testing and optimisation work. e.g.
* Bitmanip codegen next steps
* ExtInt ABI <https://reviews.llvm.org/D79118>
* Mainly a heads up - LGTM, though we normally let the backend
handle large scalars rather than relying on the frontend to convert to
sret etc. I think we need more testing of arbitrary-width integers in
* No other topics were submitted, as always, please do submit things
you'd like to discuss
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