[llvm-dev] [ARM] Thumb code-gen for 8-bit imm arguments results in extra reg copies

[Prathamesh Kulkarni via llvm-dev]

On Thu, 18 Jun 2020 at 18:22, Tim Northover <t.p.northover at gmail.com> wrote:
>
> On Thu, 18 Jun 2020 at 10:39, Prathamesh Kulkarni
> <prathamesh.kulkarni at linaro.org> wrote:
> > Sorry, I didn't entirely understand why it isn't safe to propagate
> > while checking for single live def, could you please elaborate?
>
> Imagine something like:
>
>     %1:gpr = tMOVi8 123, def dead %cpsr
>     [...]
>     tCMPr %2:gpr, %3:gpr, def %cpsr
>     %4:gpr = COPY %1:gpr
>     tBcc %bb.1, 1, implicit %cpsr
>
> The initial mov only has one live use, but reinserting it between the
> cmp and the bne would make the branch go to the wrong place. You need
> %cpsr to be dead at the place you're intending to insert the mov too.
Hi Tim,
Ah indeed, thanks for the clarification!
Would it make sense to restrict the transform where:
(a) DefMI and CopyMI are in same basic block
(b) Check that at least one of the instructions following DefMI till
end of block define cpsr
before it is used ? So the value of cpsr at DefMI is still dead.

Is there any API I could use to check if a particular instruction
defines / uses cpsr ?

Thanks,
Prathamesh
>
> > If reMaterializeTrivialDef is not the right place to handle the
> > transform, could you please suggest where should I look for adding it?
>
> It might be the right place, otherwise it might fit in with a separate
> ARM pass of its own, or a known more expensive computation that hasn't
> been written yet. I don't know, but we should at least consider
> whether we want to complicate the interface for these functions.
>
> Cheers.
>
> Tim.