[llvm-dev] Manipulating global address inside GlobalAddress SDNode in (RISCV) LLVM backend

Reshabh Sharma via llvm-dev llvm-dev at lists.llvm.org
Thu Jul 11 10:23:10 PDT 2019


On Thu, Jul 11, 2019 at 10:42 PM Tim Northover <t.p.northover at gmail.com>
wrote:

> On Thu, 11 Jul 2019 at 18:03, Reshabh Sharma <reshabhsh at gmail.com> wrote:
> > Ah now I could see it more clearly. I was not sure that should I add
> them (MO_LO32_LO and MO_LO32_HI), btw this was backup plan. Probably for
> now we are going with this. I implemented them today and they seem to work
> well.
>
> By the way, I probably should have said sooner but most targets with
> 64-bit pointers don't (at least in the default mode) materialize
> 64-bit absolute pointers as we've been discussing.
>
> x86 requires all global variables live with code in the low 2GB of
> memory, which allows direct use of %rip-relative addressing-modes.
> AArch64 requires all globals & code to be within 4GB of each other at
> an arbitrary location in memory.
>

Correct me if I understood it wrong, keeping global variables at some
arbitrary location in memory with a limit of 4GB so that they can be
addressed in 32 bits?


> If you adopted similar constraints for RISC-V you could probably use
> the existing code virtually unchanged.
>

We are trying to support 4GB+ memory in address space 1 using 64 bit
pointers in that address space, I guess then this might not apply? What do
you think?

Cheers.
>
> Tim.
>
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