[llvm-dev] Intrinsics for RISCV CSR instructions

[David Jones via llvm-dev]

I notice that no intrinsics have been defined for the CSRRW/CSRRS/CSRRC
instructions.

It would be convenient to have intrinsics for these to allow CSR
manipulation directly from IR code.

Interestingly, this seems to be true for PowerPC (no intrinsics for
mfdcr/mtdcr) and X86 (no in/out) as well.

Are there plans to define standard RISCV intrinsics for this?
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