[llvm-dev] Spills on second bank of registers

Joan Lluch via llvm-dev llvm-dev at lists.llvm.org
Tue Aug 20 00:29:25 PDT 2019

Hi Tim,

I wonder if you could help me with the following, even if just giving some pointers about where to look. I previously posted a similar question in the mailing list, but unfortunately I have not received a reply. This is the subject:

I want to reduce the number of register spills to the stack that are created around storeRegToStackSlot and loadRegFromStackSlot 

In order to do so, I can use free registers from a second set of registers. The idea is that these registers would be used as spills, instead of stack slots. These registers may be free when they do not intervene in any instructions on a given function. 

I assumed that, by default, LLVM would figure out that there are free registers (albeit from a different register class) and would use them as temporaries instead of creating stack spills of the regular register set. However this is not the case. The stack spills are created anyway despite being registers unused on the second register bank. 

I am unsure about why this happens or how to correct/implement this, or where to look. Any pointers would be appreciated.


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