[llvm-dev] tablegen dag syntax question

Chris Sears via llvm-dev llvm-dev at lists.llvm.org
Fri Apr 26 19:41:15 PDT 2019

I think the comment for this in Target.td is confusing:

  dag OutOperandList;       // An dag containing the MI def operand list.
  dag InOperandList;        // An dag containing the MI use operand list.

It's not an MI, MachineInstr. It's a an MCInst. Also, the comment could
mention allocable registers.

On the other hand, there are plenty of examples of Uses and Defs in the
various backends to go by.
Its comment in Target.td isn't helpful either:

  // The follow state will eventually be inferred automatically from the
  // instruction pattern.

That could mention implicit registers.
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