[llvm-dev] [EXT] [A bug?] Failed to use BuildMI to add R7 - R12 registers for tADDi8 and tPUSH of ARM

Eli Friedman via llvm-dev llvm-dev at lists.llvm.org
Mon Apr 15 11:57:05 PDT 2019

tADDi8 and tPUSH specifically refer to 16-bit instructions.  Most 16-bit Thumb instructions are only allowed to refer to low registers.  The corresponding 32-bit instructions are t2ADDri and t2STMDB_UPD.  For more details on ARMv7-M instruction encodings, see the reference manual at https://developer.arm.com/docs/ddi0403/latest .

You're getting weird behavior because the instruction encoder assumes the code doesn't contain any impossible instructions.


> -----Original Message-----
> From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of Jie Zhou via
> llvm-dev
> Sent: Sunday, April 14, 2019 11:18 AM
> To: llvm-dev <llvm-dev at lists.llvm.org>
> Subject: [EXT] [llvm-dev] [A bug?] Failed to use BuildMI to add R7 - R12 registers
> for tADDi8 and tPUSH of ARM
> Hi all,
> I’m trying to insert some add/sub and push/pop instructions in a
> MachineFunction pass for ARMv7-M. However, I encountered something weird.
> For an add, when I use
> 	BuildMI(….., TII->get(ARM::tADDi8),
> reg).addReg(reg).addReg(reg).addImm(imm).
> if reg is R0 - R7, everything is fine: I would get something like
> 	adds r1, 4
> But if I use R8 - R12 as the reg in the BuildMI, I wouldn’t get the correct register
> in the assembly code. For example, when I pass R8 to it, I would get
> 	adds r0, 4
> rather than
> 	adds r8, 4.
> Similar problems happen to push and pop instructions. I can create a push/pop if
> the register list only contains registers R0 - R7, but
> for registers whose number are greater than R7, the generated asm code
> doesn’t have it. For example,
> 	BuildMI(……, TII->get(ARM::tPUSH), R8)…..
> would give me
> 	push {}
> Is this a bug in the LLVM ARM code generator? Or is there a reason why we
> cannot use big-number registers for add/sub and push/pop?
> Thanks,
> - Jie
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