[llvm-dev] [A bug?] Failed to use BuildMI to add R7 - R12 registers for tADDi8 and tPUSH of ARM

Jie Zhou via llvm-dev llvm-dev at lists.llvm.org
Sun Apr 14 12:21:17 PDT 2019

Sorry for not being specific enough. ARMv7-M includes Thumb and Thumb2.
It has 12 regular registers (R0 - R12), and R8 - R12 are used.
I can generate mov instruction that from/ R8-R12 to/from R0-R6.
From this ARM page http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0068b/ch03s03s01.html
R9 - R12 have their conventional usage, but I don’t if this is the reason we cannot
use them arbitrarily. The fact that we can use it to generate mov instructions but
not add/sub and push/pop confuses me.

- Jie

On Apr 14, 2019, at 14:55, Craig Topper <craig.topper at gmail.com<mailto:craig.topper at gmail.com>> wrote:

I don't know much about ARM. But it looks like tADDi8 is a Thumb instruction and it can only use R0-R7.

tPUSH probably as a similar issue. But it's also a store instruction and doesn't produce a register output. So you should use the form of BuildMI that doesn't take a register as its last argument.


On Sun, Apr 14, 2019 at 11:17 AM Jie Zhou via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote:
Hi all,

I’m trying to insert some add/sub and push/pop instructions in a MachineFunction pass for ARMv7-M. However, I encountered something weird.
For an add, when I use

        BuildMI(….., TII->get(ARM::tADDi8), reg).addReg(reg).addReg(reg).addImm(imm).

if reg is R0 - R7, everything is fine: I would get something like

        adds r1, 4

But if I use R8 - R12 as the reg in the BuildMI, I wouldn’t get the correct register in the assembly code. For example, when I pass R8 to it, I would get

        adds r0, 4

rather than

        adds r8, 4.

Similar problems happen to push and pop instructions. I can create a push/pop if the register list only contains registers R0 - R7, but
for registers whose number are greater than R7, the generated asm code doesn’t have it. For example,

        BuildMI(……, TII->get(ARM::tPUSH), R8)…..

would give me

        push {}

Is this a bug in the LLVM ARM code generator? Or is there a reason why we cannot use big-number registers for add/sub and push/pop?

- Jie
LLVM Developers mailing list
llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190414/ad7c898e/attachment.html>

More information about the llvm-dev mailing list