[llvm-dev] Question regarding X86::getCondFromBranch()

[Craig Topper via llvm-dev]

Nothing in LLVM today creates a MachineInstr that has JCC_2 or JCC_4
opcode. Those only get created by assembler relaxation after everything has
been converted to MCInst. Do you have your own code that is creating
JCC_2/JCC_4?

~Craig


On Thu, Apr 11, 2019 at 9:47 AM S. Bharadwaj Yadavalli <bharadwajy at gmail.com>
wrote:

> Hi,
>
> I notice that the following recent addition
>
> X86::CondCode X86::getCondFromBranch(const MachineInstr &MI) {
>   switch (MI.getOpcode()) {
>   default: return X86::COND_INVALID;
>   case X86::JCC_1:
>     return static_cast<X86::CondCode>(
>         MI.getOperand(MI.getDesc().getNumOperands() - 1).getImm());
>   }
> }
>
> returns an invalid condition for JCC_2 and JCC_4 conditional opcodes.
>
> What is the suggested way to figure out the condition code for JCC_2 and
> JCC_4?
>
> Should I just roll one up for myself to handle such opcodes based on
> the above? Am I missing something conceptually?
>
> Thanks,
>
> Bharadwaj
>
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