[llvm-dev] ‘mayLoad’ and ‘mayStore’ attributes

via llvm-dev llvm-dev at lists.llvm.org
Fri Sep 28 04:58:35 PDT 2018


Hi Dominique,

MayLoad/MayStore is a property that is true if the instruction could 
possibly read/write memory even if it is not just a simple load/store 
instruction. This is documented in 
llvm/include/llvm/CodeGen/MachineInstr.h: 
http://llvm.org/doxygen/classllvm_1_1MachineInstr.html#a682028ac4a06c9e3550fa8e6e1909fa9

Looking it functions referencing it, it does affect scheduling, e.g., 
whether instructions can be reordered or folded into others.

Memory barriers or memory fences are part of a machine's and/or compilers 
memory model that define which operations (loads or stores in a single or 
different threads) may be reordered and in which way. A "load barrier" 
might mean an instruction within a CPU architecture that forces all memory 
stores to finish before the next load, but you'll have to consult the 
exact memory model of that CPU. For a compiler/LLVM, a "load barrier" 
might be an intrinsic limits which type of instruction reordering the 
compiler can do (and possibly also issue a memory fence instruction to 
tell the CPU the same).

In general, for memory models I recommend:
https://www.kernel.org/doc/Documentation/memory-barriers.txt for a general 
description and how it effects the Linux kernel
https://en.cppreference.com/w/c/atomic/memory_order for how it relates to 
C code (the LLVM memory model tries to follow that I believe)
http://releases.llvm.org/4.0.1/docs/LangRef.html#ordering for how LLVM 
specifically defines different memory orderings
http://releases.llvm.org/4.0.1/docs/LangRef.html#fence-instruction The 
fence instruction might be the specific load barrier you asked about in 
LLVM IR

Boldizsar Palotas




From:   Dominique Torette via llvm-dev <llvm-dev at lists.llvm.org>
To:     "llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org>
Date:   2018.09.28 10:59
Subject:        [llvm-dev] ‘mayLoad’ and ‘mayStore’ attributes
Sent by:        "llvm-dev" <llvm-dev-bounces at lists.llvm.org>



Hi,
 
I have a  few short questions:
I haven’t found any documentation on the purposes of the ‘mayLoad’ and 
‘mayStore’ attributes of the .td file Instruction class...
Have these attributes some effects on final instruction scheduling ? What 
is the concept of ‘load barrier’ ?
References to articles will be welcome.
 
TIA,        Dominique T.







Dominique Torette 
System Architect
Rue des Chasseurs Ardennais - Liège Science Park - B-4031 Angleur 
Tel: +32 (0) 4 361 81 11 - Fax: +32 (0) 4 361 81 20 
www.spacebel.be
 

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