[llvm-dev] [FPEnv] FNEG instruction

[Kevin Neal via llvm-dev]

Which exactly was the plan?

Add a new, regular instruction?

Add a new constrained math intrinsic?

Both?

Andrew Kaylor made a good point here:

  *   As I said, all LLVM IR FP instructions are //assumed// to have no side effects. I'm not sure we want an instruction that goes beyond this to be //defined// as having no side effects. It adds a complication to the language and introduces restrictions on the code generator that aren't needed in the ordinary case of non-constrained FP.  The target code generators are free to do anything they want with the other FP instructions, including things that introduce new FP status flags being set that otherwise wouldn't be, and for the normal case the back ends should be free to do that with fneg as well.

Personally, I’m not sure I like the idea of having exceptions to the rule that FP instructions also have constrained versions. So I lean towards having both a regular FNEG and a constrained version.

But I think I remember pushback. I can’t put my fingers on the message, though.

--
Kevin P. Neal
SAS/C and SAS/C++ Compiler
Host Research and Development
SAS Institute, Inc.



From: xkrebstarx <xkrebstarx at gmail.com>
Sent: Tuesday, September 11, 2018 2:29 PM
To: Cameron Jordan McInally <cameron.mcinally at nyu.edu>
Cc: t.p.northover at gmail.com; llvm-dev at lists.llvm.org; ulrich.weigand at de.ibm.com; Kevin Neal <Kevin.Neal at sas.com>
Subject: Re: [llvm-dev] [FPEnv] FNEG instruction


EXTERNAL
Ping...

I'd like to hear from the major stakeholders on whether we can proceed with this change or not. Either way, it would be nice to pass this road block. If anyone watching is in close proximity to those that can approve such a change, I would appreciate it if you would tap them on the shoulder for me.

Thanks again,
Cameron

On Thu, Aug 30, 2018 at 11:38 AM Cameron McInally via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote:
On Thu, Aug 30, 2018 at 11:14 AM, Tim Northover <t.p.northover at gmail.com<mailto:t.p.northover at gmail.com>> wrote:
...
I don't think it matters for the question at hand, but I tested
AArch64 too and it exhibits the behaviour you were describing. That
is, we'd have problems if an fsub -0.0 was actually CodeGened like
that (it's not, of course).

Great data point. So it's not just a theoretical problem. Thanks, Tim!

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