[llvm-dev] [SelectionDAG] [TargetOp] How to get sub-half of immediate?

[Kevin Choi via llvm-dev]

Hi all,

This seems like a dumb question but while setting up a pattern in TD 
file, I got stuck on trying to get each half of an immediate as the 
half-sized type (ie. i64 imm -> pair of i32 imm's). Is there an existing 
way to do it? I've tried the 'EXTRACT_SUBREG' but that seems to error at 
the end of scheduling. Looking at Target.td, I'm not sure which opcode 
is meant for my need. Copying imm to reg would be another solution but 
I'm also not sure which opcode forces it.

Many Thanks,

Kevin