[llvm-dev] Disable spilling sub-registers in LLVM

ahmede via llvm-dev llvm-dev at lists.llvm.org
Mon Jan 29 13:20:42 PST 2018


I wonder if there is a way in LLVM to disable spilling a register-class 
while still enabling the super-registers of this register-class to be 

If not, how can we implement spilling for sub-registers when stack 
load/stores can only operate on the super registers? Is there a way even 
if it is suboptimal?


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