[llvm-dev] MachineVerifier and undef
Jon Chesterfield via llvm-dev
llvm-dev at lists.llvm.org
Tue Jan 23 03:29:49 PST 2018
I'm working on getting an out of tree target machine verifier clean.
This has found some nasty bugs so I'd like to continue with it.
One instance of bad machine code is "Using an undefined physical
register". This arises whenever undef propagates to a machine
instruction. Usually this means the input was meaningless - e.g. call
an undefined address. Other times it's a consequence of optimising
vector code, e.g. converting <3 x float> into <4 x float> or
construction via IMPLICIT_DEF.
The signal to noise ratio on this is bad. E.g. storing an undefined
value to the stack is a missing optimisation, which is sad, but not
necessarily a reason to halt the compilation. Carefully removing every
instance of undef in DAGCombine helps but does not suffice because MIR
passes, notably subregister liveness tracking, reintroduce undef
I think either I'm missing part of the handling of undef values
(should there be a MIR pass dedicated to removing them?) or I've
missed the goal of the verification pass. I'd like to enable it for
all internal testing. Perhaps it's intended more as an ad hoc
How should I use a verifier pass that halts on undef when there are
lots of undef values? Advice would be welcome!
More information about the llvm-dev