[llvm-dev] Suggestions on code generation for SIMD

Amara Emerson via llvm-dev llvm-dev at lists.llvm.org
Mon Jan 8 12:01:53 PST 2018

> On 8 Jan 2018, at 19:41, Linchuan Chen <chenlinc at cse.ohio-state.edu> wrote:
> Thanks Amara so much for the info!
> One more question: what do people usually do if they want to generate vectorized code for some existing c/c++ code? 
> Do they usually do C/C++ source level transformation, or do at LLVM's IR level? 
> I know clang supports auto vectorizations, such as loop vectorization and SLP, but they are not flexible enough if we 
> want to do more custom vectorizations or handle more complex cases, for example, SLP might not be able to handle 
> branches in the code (or may be latest version already can handle branches using mask).
> On Mon, Jan 8, 2018 at 11:30 AM, Amara Emerson via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote:
>> On 6 Jan 2018, at 00:26, Linchuan Chen via llvm-dev <llvm-dev at lists.llvm.org <mailto:llvm-dev at lists.llvm.org>> wrote:
>> Hi everyone,
>> I'm quite new to LLVM, but am working on a project that might need to generate some SIMD code using LLVM. The SIMD code will be using INTEL MIC intrinsics and I'm not sure about the
>> steps and tool set that I need to use to generate those.
>> I also have a confusion on the following problems:
>> Do people usually generate SIMD code at source code level, using __m512?
>> If not, does LLVM have corresponding IR instructions for the SIMD registers and instructions?
>> Since I'm new, I would appreciate any help that could give me some directions at any level. Some references would also help. Thanks in advance!
> Hi Linchuan,
> I believe clang supports Intel AVX512 intrinsics so it should be possible to generate vector code using that.
> For 2), LLVM has first class vector types such as <4 x i32> and can do the usual things on those types, including masking. The vectoriser is where most of the vector code that LLVM generates will originate from. These types aren’t target specific however, and there are no notions of vector “registers” at the IR level.
> Cheers,
> Amara
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The vast majority of the time people will rely on source level pragmas [1], LLVM IR is designed to be machine friendly, not something intended for users to manually edit themselves. You can do it, but it’s tedious and error prone. If you need more control over the vectorisation than the pragmas allow, then the C intrinsics are the best choice.


[1] http://clang.llvm.org/docs/LanguageExtensions.html#extensions-for-loop-hint-optimizations <http://clang.llvm.org/docs/LanguageExtensions.html#extensions-for-loop-hint-optimizations>

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