[llvm-dev] InstAlias with tied operands - can it be supported?
Florian Hahn via llvm-dev
llvm-dev at lists.llvm.org
Thu Jan 4 01:41:18 PST 2018
On 04/01/2018 02:23, via llvm-dev wrote:
> Hi Daniel,
> I defined checkEarlyTargetMatchPredicate() to explicitly check for the
> tied operands, and it worked.
> I could define an alias like: InstAlias<"oldOP $rd, $rd, $rs1", (NEWOP
> $rd, $rs1)>
I think for some new Arm SVE instruction there is a related problem.
Some instructions come with a constraint that the destination register
must be the same as the first source data register. The example below is
invalid, because z1 != z2.
add z1, p0/m, z2, z3
Sander's approach to fixing that was adding a `tied` constraint, as well
as extending the AsmMatcher to enforce those constraints during assembly
parsing. The patch is here: https://reviews.llvm.org/D41446
I am not entirely sure if that would help your usecase, but I thought it
might be helpful and it would be great if we could come up with a single
way to handle those tied constraints :)
More information about the llvm-dev