[llvm-dev] A way to opt out of a dag combine?

Jon Chesterfield via llvm-dev llvm-dev at lists.llvm.org
Mon Apr 9 15:28:24 PDT 2018


Hey,

Indeed. The shuffle_vector replaces the build_vector shortly after
visitBUILD_VECTOR returns. This dump is immediately before and after
visitBUILD_VECTOR calls reduceBuildVecToShuffle. The shuffle_vector<0,0>
then gets lowered as usual, to code that doesn't implement
shuffle_vector<0,2>.

There are other cases where the indexing calculation works out correctly,
but for some reason it misfires on this input DAG. The implementation
involves chasing indices through intermediate data structures and I don't
have an adequate handle on how it is intended to work. The control flow
constructs a single shuffle node with a vector mask calculated from
previous information and then returns, so at least the shuffle combination
code at the end of the function isn't involved.

Disabling reduceBuildVecToShuffle fixes the problem completely for my back
end, but I'd rather get to the root cause.

Cheers

Jon


------------------------------
>
> Message: 4
> Date: Mon, 9 Apr 2018 11:33:37 -0500
> From: Krzysztof Parzyszek via llvm-dev <llvm-dev at lists.llvm.org>
> To: llvm-dev at lists.llvm.org
> Subject: Re: [llvm-dev] llvm-dev Digest, Vol 166, Issue 22
> Message-ID: <2c3b814b-8bf3-816d-2737-6dede6396759 at codeaurora.org>
> Content-Type: text/plain; charset=utf-8; format=flowed
>
> The node t29 seems to be dead. The CopyToReg m0 still uses t25, same as
> the original code.
>
> Does t29 disappear later on?
>
> -Krzysztof
>
>
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