[llvm-dev] Reaching definitions on Machine IR post register allocation
Krzysztof Parzyszek via llvm-dev
llvm-dev at lists.llvm.org
Tue Sep 12 13:24:34 PDT 2017
A quick check reveals that adding extra subregisters, or extra aliases
changes the register pressure sets. Instead of the current 30, there are
90. This causes differences in register pressure calculation, which in
turn causes the scheduler to do slightly different things.
On 9/12/2017 1:07 PM, Krzysztof Parzyszek via llvm-dev wrote:
> On 9/12/2017 1:01 PM, Quentin Colombet via llvm-dev wrote:
>>> On Sep 11, 2017, at 11:00 PM, Raghavan, Venugopal via llvm-dev
>>> <llvm-dev at lists.llvm.org> wrote:
>>> I agree that adding extra register units for x86 would be the right
>>> way to fix this. Do you know if there is a plan to fix this?
>> No concrete plan, no. We've been thinking about for quite some time
>> now, but never got at it.
> I can definitely look into it.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by The Linux Foundation
More information about the llvm-dev